[PATCH] D134019: [MachineCycle][NFC]add a cache from block and top level cycle mapping

[Nikita Popov via Phabricator via llvm-commits]

nikic added inline comments.


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Comment at: llvm/include/llvm/ADT/GenericCycleImpl.h:183
+    if (It.second == Child)
+      It.second = NewParent;
 }
----------------
This assumes the new parent is a top level cycle. Is this guaranteed?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D134019/new/

https://reviews.llvm.org/D134019