[PATCH] D132322: [AArch64][SelectionDAG] Optimize multiplication by constant

Allen zhong via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 15 23:17:30 PDT 2022


Allen marked an inline comment as done.
Allen added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/mul_pow2.ll:306
+; GISEL-NEXT:    sub w0, w8, #1
+; GISEL-NEXT:    ret
+  %mul = mul nsw i32 %x, 6
----------------
efriedma wrote:
> There is one other possible sequence here:
> 
> ```
> mov w8, #6
> mov w9, #-1
> madd w0, w0, w8, w9
> ```
> 
> This is obviously not that exciting in isolation, but it might make sense if we can hoist the "mov" instructions out of a loop.
hi @efriedma, I try to generate the new sequence as you showed, but I don't know how to put a const into a register? as the operand of madd should not be const value.

  For the const **AddSub->getOperand(1)**, even when I use a ISD::ADD , it still retrun a const value.
```
     SDValue Const = DAG.getNode(ISD::ADD, DL, VT, AddSub->getOperand(1), DAG.getConstant(0, DL, VT));

    (gdb) p Const->dump()
    t5: i32 = Constant<-1>
    $10 = void
    (gdb) p AddSub->getOperand(1)->dump()
     t5: i32 = Constant<-1>
```


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