[llvm] b2c195d - [CGP] Update failing test missed in 81a11da762577.

[Florian Hahn via llvm-commits]

Author: Florian Hahn
Date: 2022-09-15T19:35:25+01:00
New Revision: b2c195da6df9de2f0eac5a4b108cf04ec609eb47

URL: https://github.com/llvm/llvm-project/commit/b2c195da6df9de2f0eac5a4b108cf04ec609eb47
DIFF: https://github.com/llvm/llvm-project/commit/b2c195da6df9de2f0eac5a4b108cf04ec609eb47.diff

LOG: [CGP] Update failing test missed in 81a11da762577.

Added: 
    

Modified: 
    llvm/test/Transforms/CodeGenPrepare/AArch64/zext-to-shuffle.ll

Removed: 
    


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diff  --git a/llvm/test/Transforms/CodeGenPrepare/AArch64/zext-to-shuffle.ll b/llvm/test/Transforms/CodeGenPrepare/AArch64/zext-to-shuffle.ll
index 7de6718d41edf..0d080442c8002 100644
--- a/llvm/test/Transforms/CodeGenPrepare/AArch64/zext-to-shuffle.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/AArch64/zext-to-shuffle.ll
@@ -115,10 +115,11 @@ define void @zext_v8i8_to_v8i32_in_loop(i8* %src, i32* %dst) {
 ; CHECK-NEXT:    [[SRC_GEP:%.*]] = getelementptr i8, i8* [[SRC:%.*]], i64 [[IV]]
 ; CHECK-NEXT:    [[SRC_GEP_CAST:%.*]] = bitcast i8* [[SRC_GEP]] to <8 x i8>*
 ; CHECK-NEXT:    [[LOAD:%.*]] = load <8 x i8>, <8 x i8>* [[SRC_GEP_CAST]], align 8
-; CHECK-NEXT:    [[EXT:%.*]] = zext <8 x i8> [[LOAD]] to <8 x i32>
+; CHECK-NEXT:    [[TMP0:%.*]] = shufflevector <8 x i8> [[LOAD]], <8 x i8> <i8 0, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison>, <32 x i32> <i32 0, i32 8, i32 8, i32 8, i32 1, i32 8, i32 8, i32 8, i32 2, i32 8, i32 8, i32 8, i32 3, i32 8, i32 8, i32 8, i32 4, i32 8, i32 8, i32 8, i32 5, i32 8, i32 8, i32 8, i32 6, i32 8, i32 8, i32 8, i32 7, i32 8, i32 8, i32 8>
+; CHECK-NEXT:    [[TMP1:%.*]] = bitcast <32 x i8> [[TMP0]] to <8 x i32>
 ; CHECK-NEXT:    [[DST_GEP:%.*]] = getelementptr i32, i32* [[DST:%.*]], i64 [[IV]]
 ; CHECK-NEXT:    [[DST_GEP_CAST:%.*]] = bitcast i32* [[DST_GEP]] to <8 x i32>*
-; CHECK-NEXT:    store <8 x i32> [[EXT]], <8 x i32>* [[DST_GEP_CAST]], align 32
+; CHECK-NEXT:    store <8 x i32> [[TMP1]], <8 x i32>* [[DST_GEP_CAST]], align 32
 ; CHECK-NEXT:    [[IV_NEXT]] = add nuw i64 [[IV]], 16
 ; CHECK-NEXT:    [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 128
 ; CHECK-NEXT:    br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]