[PATCH] D133770: AMDGPU: Use GlobalPriority for largest register tuples

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 15 07:03:38 PDT 2022


arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.td:796
+
+let GlobalPriority = true in {
 defm "" : SRegClass<16, [v16i32, v16f32, v8i64, v8f64], SGPR_512Regs, TTMP_512Regs>;
----------------
foad wrote:
> Would it be cleaner to set this inside SRegClass based on !ge(numRegs, 16)? Or do it in a common base class of SRegClass/VRegClass/ARegClass?
I don't think it would really be cleaner. The common base class would be all the way up to SIRegisterClass, which currently doesn't have a number of registers parameter. As is we could move this to let blocks inside of the multiclass definitions for each class, which I think is even uglier


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133770/new/

https://reviews.llvm.org/D133770



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