[PATCH] D133840: AMDGPU: Add a pass to rewrite certain undef in PHI

[Ruiling, Song via Phabricator via llvm-commits]

ruiling added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/rewrite-undef-for-phi.ll:92
+  %ind = phi i32 [ 0, %entry ], [ 0, %if ], [ %inc, %loop ]
+  %c2 = phi float [ undef, %if ], [ %c, %entry ], [ undef, %loop ]
+  %inc = add i32 %ind, 1
----------------
In case we have different IR "%c2 = phi float [ undef, %if ], [ %c, %entry ], [ %some_other_value, %loop ]", %c2 will be divergent after StructurizeCFG. But such kind of "joining divergent threads in loop header" will be split by SIAnnotateControlFlow. So %c2 will be lowered to something like:
```
split.cf
  %c2_split = phi float [ undef, %if ], [ %c, %entry ]
  call void @llvm.amdgcn.end.cf()
  br label %loop

loop:
  %c2 = phi float [%c2_split, %split.cf], [%some_other_value, %loop]
```
%c2_split should also be rewritten by this pass. So I have to move the pass after SIAnnotateControlFlow to handle this situation.




Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D133840/new/

https://reviews.llvm.org/D133840