[llvm] c9ef7d4 - llvm-reduce: Do not insert replacement IMPLICIT_DEFs for dead defs

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2022-09-14T13:21:14-04:00
New Revision: c9ef7d49abffa24413f9682ba1020d01d7f5fb67

URL: https://github.com/llvm/llvm-project/commit/c9ef7d49abffa24413f9682ba1020d01d7f5fb67
DIFF: https://github.com/llvm/llvm-project/commit/c9ef7d49abffa24413f9682ba1020d01d7f5fb67.diff

LOG: llvm-reduce: Do not insert replacement IMPLICIT_DEFs for dead defs

Also skip dead defs when looking for a previous vreg with the same
class. This helps avoid some mid-reduction verifier errors when
LiveIntervals computation starts introducing dead flags everywhere.

Added: 
    llvm/test/tools/llvm-reduce/mir/instr-reduce-dead-def.mir

Modified: 
    llvm/tools/llvm-reduce/deltas/ReduceInstructionsMIR.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/test/tools/llvm-reduce/mir/instr-reduce-dead-def.mir b/llvm/test/tools/llvm-reduce/mir/instr-reduce-dead-def.mir
new file mode 100644
index 0000000000000..6acec934a1690
--- /dev/null
+++ b/llvm/test/tools/llvm-reduce/mir/instr-reduce-dead-def.mir
@@ -0,0 +1,40 @@
+# REQUIRES: amdgpu-registered-target
+# RUN: llvm-reduce -abort-on-invalid-reduction -simplify-mir --delta-passes=instructions -mtriple=amdgcn-amd-amdhsa --test FileCheck --test-arg --check-prefix=CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t 2> %t.log
+# RUN: FileCheck --check-prefix=RESULT %s < %t
+
+# CHECK-INTERESTINGNESS-LABEL: name: dead_def
+# CHECK-INTERESTINGNESS: S_ENDPGM
+
+# Make sure no IMPLICIT_DEF is introduced for dead operands.
+# RESULT: bb.0
+# RESULT-NEXT: S_ENDPGM
+
+---
+name: dead_def
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    S_WAITCNT 0
+    dead %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    S_ENDPGM 0
+...
+
+# CHECK-INTERESTINGNESS-LABEL: name: prev_def_rc_is_dead
+# CHECK-INTERESTINGNESS: V_MOV_B32_e32
+# CHECK-INTERESTINGNESS: V_MOV_B32_e32
+# CHECK-INTERESTINGNESS: V_MOV_B32_e32
+
+# RESULT: %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+# RESULT-NEXT: dead %1:vgpr_32 = V_MOV_B32_e32 %0, implicit $exec
+# RESULT-NEXT: %2:vgpr_32 = V_MOV_B32_e32 %0, implicit $exec
+---
+name: prev_def_rc_is_dead
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    S_WAITCNT 0
+    %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+    dead %1:vgpr_32 = V_MOV_B32_e32 %0, implicit $exec
+    %2:vgpr_32 = V_MOV_B32_e32 %0, implicit $exec
+    S_ENDPGM 0, implicit %2
+...

diff  --git a/llvm/tools/llvm-reduce/deltas/ReduceInstructionsMIR.cpp b/llvm/tools/llvm-reduce/deltas/ReduceInstructionsMIR.cpp
index 9b2a4759026ea..f21bcdcf54d38 100644
--- a/llvm/tools/llvm-reduce/deltas/ReduceInstructionsMIR.cpp
+++ b/llvm/tools/llvm-reduce/deltas/ReduceInstructionsMIR.cpp
@@ -33,7 +33,7 @@ static Register getPrevDefOfRCInMBB(MachineBasicBlock &MBB,
     auto &MI = *RI;
     // All Def operands explicit and implicit.
     for (auto &MO : MI.operands()) {
-      if (!MO.isReg() || !MO.isDef())
+      if (!MO.isReg() || !MO.isDef() || MO.isDead())
         continue;
       auto Reg = MO.getReg();
       if (Register::isPhysicalRegister(Reg))
@@ -89,7 +89,7 @@ static void extractInstrFromFunction(Oracle &O, MachineFunction &MF) {
   // some other dominating definition (that is not to be deleted).
   for (auto *MI : ToDelete) {
     for (auto &MO : MI->operands()) {
-      if (!MO.isReg() || !MO.isDef())
+      if (!MO.isReg() || !MO.isDef() || MO.isDead())
         continue;
       auto Reg = MO.getReg();
       if (Register::isPhysicalRegister(Reg))