[PATCH] D133829: [RISCV] Add cost model for insertelement/extractelement of vector type that should be splitted.

[Philip Reames via Phabricator via llvm-commits]

reames added a comment.

Does the proposed costing match the current lowering?  I haven't looked.

I would expect the lowering to be able to do the following:

- For a constant index w/ fixed vectors, emit a single extract/insert into a particular split register value.
- For a constant index w/ scalable vectors, emit a single instruction when index < minimum VLEN implied VLMAX.
- Use a sequence of masked slidedowns to extract an arbitrary index from an arbitrary set of vector registers.  Or possibly a vcompress instead.

The spill/load lowering is legal, but rather sub-optimal.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D133829/new/

https://reviews.llvm.org/D133829