[PATCH] D133766: [LLVM][AArch64] Don't warn about clobbering X16 when Speculative Load Hardening is used

[David Spickett via Phabricator via llvm-commits]

DavidSpickett added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/speculation-hardening-dagisel.ll:4-7
+; As SLH is falling back to a technique that doesn't use X16, we shouldn't see any warnings about clobbers.
+; (this would come from f_clobbered_reg_w16, but warnings are first in the output)
+; CHECK-NOT: warning: inline asm clobber list contains reserved registers: W16
+; CHECK-NOT: warning: inline asm clobber list contains reserved registers: X16
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kristof.beyls wrote:
> The patch LGTM.
> The only thing I was wondering whas if the test case could be hardened a bit further against the warning text changing in the future. If it does, the 2 CHECK-NOT lines probably would no longer be checking what is intended and no-one would notice.
> I can't come up with a really good solution - so let's commit this as is.
I might be able to reserve x16 using the equivalent of the command line option, for the non SLH run. Check that you do get the warning.

Then the test will fail if someone were to update it.


Repository:
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  https://reviews.llvm.org/D133766/new/

https://reviews.llvm.org/D133766