[llvm] ab1c259 - [RISCV] Assemble `call foo` to R_RISCV_CALL_PLT
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 13 18:48:04 PDT 2022
Author: Fangrui Song
Date: 2022-09-13T18:47:55-07:00
New Revision: ab1c2596137220e1165115fa9079373aa0d1823b
URL: https://github.com/llvm/llvm-project/commit/ab1c2596137220e1165115fa9079373aa0d1823b
DIFF: https://github.com/llvm/llvm-project/commit/ab1c2596137220e1165115fa9079373aa0d1823b.diff
LOG: [RISCV] Assemble `call foo` to R_RISCV_CALL_PLT
R_RISCV_CALL/R_RISCV_CALL_PLT distinction isn't necessary. R_RISCV_CALL has been
deprecated as a resolution to
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/issues/98 .
ld.lld and mold treat the two relocation types the same. GNU ld has a custom
handling for undefined weak functions which is unnecessary: calling an
unresolved undefined weak function is UB and GNU ld can handle the case without
a relocation error (such a function call is usually guarded by a zero value
check and should be allowed).
This patch assembles `call foo` to use R_RISCV_CALL_PLT instead of the
deprecated R_RISCV_CALL.
Note: the code generator still differentiates `call foo` and (maybe preemptible)
`call foo at plt`, but the difference is purely aesthetic.
Note: D105429 does not support R_RISCV_CALL_PLT correctly. Changed the test to
force R_RISCV_CALL for now.
Reviewed By: kito-cheng
Differential Revision: https://reviews.llvm.org/D132530
Added:
Modified:
lld/test/ELF/riscv-call.s
lld/test/ELF/riscv-undefined-weak.s
llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
llvm/test/ExecutionEngine/JITLink/RISCV/ELF_pc_indirect.s
llvm/test/MC/RISCV/function-call.s
llvm/test/MC/RISCV/linker-relaxation.s
llvm/test/MC/RISCV/option-pushpop.s
llvm/test/MC/RISCV/option-relax.s
llvm/test/MC/RISCV/pseudo-jump.s
llvm/test/MC/RISCV/tail-call.s
Removed:
################################################################################
diff --git a/lld/test/ELF/riscv-call.s b/lld/test/ELF/riscv-call.s
index ef7963ad8db5e..a6e9fde39450f 100644
--- a/lld/test/ELF/riscv-call.s
+++ b/lld/test/ELF/riscv-call.s
@@ -24,8 +24,8 @@
# RUN: ld.lld %t.rv32.o --defsym foo=_start+0x7ffff800 --defsym bar=_start+8-0x80000801 -o %t
# RUN: not ld.lld %t.rv64.o --defsym foo=_start+0x7ffff800 --defsym bar=_start+8-0x80000801 -o /dev/null 2>&1 | \
# RUN: FileCheck --check-prefix=ERROR %s
-# ERROR: relocation R_RISCV_CALL out of range: 524288 is not in [-524288, 524287]; references foo
-# ERROR: relocation R_RISCV_CALL out of range: -524289 is not in [-524288, 524287]; references bar
+# ERROR: relocation R_RISCV_CALL_PLT out of range: 524288 is not in [-524288, 524287]; references foo
+# ERROR: relocation R_RISCV_CALL_PLT out of range: -524289 is not in [-524288, 524287]; references bar
.global _start
_start:
diff --git a/lld/test/ELF/riscv-undefined-weak.s b/lld/test/ELF/riscv-undefined-weak.s
index d0996ab36f289..9220fbec1a453 100644
--- a/lld/test/ELF/riscv-undefined-weak.s
+++ b/lld/test/ELF/riscv-undefined-weak.s
@@ -46,7 +46,7 @@ relative:
## Branch relocations
## If .dynsym does not exist, an undefined weak symbol is non-preemptible.
## Treat them as PC relative relocations.
-# RELOC: 0x18 R_RISCV_CALL target 0x0
+# RELOC: 0x18 R_RISCV_CALL_PLT target 0x0
# RELOC-NEXT: 0x20 R_RISCV_JAL target 0x0
# RELOC-NEXT: 0x24 R_RISCV_BRANCH target 0x0
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
index 0c362c57e5c00..b4f7e8658c735 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
@@ -83,7 +83,7 @@ unsigned RISCVELFObjectWriter::getRelocType(MCContext &Ctx,
case RISCV::fixup_riscv_rvc_branch:
return ELF::R_RISCV_RVC_BRANCH;
case RISCV::fixup_riscv_call:
- return ELF::R_RISCV_CALL;
+ return ELF::R_RISCV_CALL_PLT;
case RISCV::fixup_riscv_call_plt:
return ELF::R_RISCV_CALL_PLT;
case RISCV::fixup_riscv_add_8:
diff --git a/llvm/test/ExecutionEngine/JITLink/RISCV/ELF_pc_indirect.s b/llvm/test/ExecutionEngine/JITLink/RISCV/ELF_pc_indirect.s
index a5381b3f9cee1..1a420b09d9c96 100644
--- a/llvm/test/ExecutionEngine/JITLink/RISCV/ELF_pc_indirect.s
+++ b/llvm/test/ExecutionEngine/JITLink/RISCV/ELF_pc_indirect.s
@@ -41,10 +41,12 @@ test_pcrel32:
# Test R_RISCV_CALL
# jitlink-check: decode_operand(test_call, 1) = ((external_func - test_call) + 0x800)[31:12]
# jitlink-check: decode_operand(test_call+4, 2)[11:0] = (external_func - test_call)[11:0]
- .globl test_call
+ .globl test_call, external_func
.p2align 1
.type test_call, at function
test_call:
- call external_func
+ .reloc ., R_RISCV_CALL, external_func
+ auipc ra, 0
+ jalr ra
ret
.size test_call, .-test_call
diff --git a/llvm/test/MC/RISCV/function-call.s b/llvm/test/MC/RISCV/function-call.s
index 1c1bac6eea52b..e0650593ec91f 100644
--- a/llvm/test/MC/RISCV/function-call.s
+++ b/llvm/test/MC/RISCV/function-call.s
@@ -8,12 +8,12 @@
.long foo
call foo
-# RELOC: R_RISCV_CALL foo 0x0
+# RELOC: R_RISCV_CALL_PLT foo 0x0
# INSTR: auipc ra, 0
# INSTR: jalr ra
# FIXUP: fixup A - offset: 0, value: foo, kind: fixup_riscv_call
call bar
-# RELOC: R_RISCV_CALL bar 0x0
+# RELOC: R_RISCV_CALL_PLT bar 0x0
# INSTR: auipc ra, 0
# INSTR: jalr ra
# FIXUP: fixup A - offset: 0, value: bar, kind: fixup_riscv_call
@@ -21,25 +21,25 @@ call bar
# Ensure that calls to functions whose names coincide with register names work.
call zero
-# RELOC: R_RISCV_CALL zero 0x0
+# RELOC: R_RISCV_CALL_PLT zero 0x0
# INSTR: auipc ra, 0
# INSTR: jalr ra
# FIXUP: fixup A - offset: 0, value: zero, kind: fixup_riscv_call
call f1
-# RELOC: R_RISCV_CALL f1 0x0
+# RELOC: R_RISCV_CALL_PLT f1 0x0
# INSTR: auipc ra, 0
# INSTR: jalr ra
# FIXUP: fixup A - offset: 0, value: f1, kind: fixup_riscv_call
call ra
-# RELOC: R_RISCV_CALL ra 0x0
+# RELOC: R_RISCV_CALL_PLT ra 0x0
# INSTR: auipc ra, 0
# INSTR: jalr ra
# FIXUP: fixup A - offset: 0, value: ra, kind: fixup_riscv_call
call mstatus
-# RELOC: R_RISCV_CALL mstatus 0x0
+# RELOC: R_RISCV_CALL_PLT mstatus 0x0
# INSTR: auipc ra, 0
# INSTR: jalr ra
# FIXUP: fixup A - offset: 0, value: mstatus, kind: fixup_riscv_call
@@ -55,7 +55,7 @@ call foo at plt
# Ensure that an explicit register operand can be parsed.
call a0, foo
-# RELOC: R_RISCV_CALL foo 0x0
+# RELOC: R_RISCV_CALL_PLT foo 0x0
# INSTR: auipc a0, 0
# INSTR: jalr a0
# FIXUP: fixup A - offset: 0, value: foo, kind: fixup_riscv_call
diff --git a/llvm/test/MC/RISCV/linker-relaxation.s b/llvm/test/MC/RISCV/linker-relaxation.s
index eed9d1e104c2f..ca1796f99cfbd 100644
--- a/llvm/test/MC/RISCV/linker-relaxation.s
+++ b/llvm/test/MC/RISCV/linker-relaxation.s
@@ -14,9 +14,9 @@
.long foo
call foo
-# NORELAX-RELOC: R_RISCV_CALL foo 0x0
+# NORELAX-RELOC: R_RISCV_CALL_PLT foo 0x0
# NORELAX-RELOC-NOT: R_RISCV_RELAX
-# RELAX-RELOC: R_RISCV_CALL foo 0x0
+# RELAX-RELOC: R_RISCV_CALL_PLT foo 0x0
# RELAX-RELOC: R_RISCV_RELAX - 0x0
# RELAX-FIXUP: fixup A - offset: 0, value: foo, kind: fixup_riscv_call
# RELAX-FIXUP: fixup B - offset: 0, value: 0, kind: fixup_riscv_relax
@@ -83,7 +83,7 @@ beq s1, s1, bar
call bar
# NORELAX-RELOC-NOT: R_RISCV_CALL
# NORELAX-RELOC-NOT: R_RISCV_RELAX
-# RELAX-RELOC: R_RISCV_CALL bar 0x0
+# RELAX-RELOC: R_RISCV_CALL_PLT bar 0x0
# RELAX-RELOC: R_RISCV_RELAX - 0x0
# RELAX-FIXUP: fixup A - offset: 0, value: bar, kind: fixup_riscv_call
# RELAX-FIXUP: fixup B - offset: 0, value: 0, kind: fixup_riscv_relax
diff --git a/llvm/test/MC/RISCV/option-pushpop.s b/llvm/test/MC/RISCV/option-pushpop.s
index 909f3d027b85b..6986b1cfe39aa 100644
--- a/llvm/test/MC/RISCV/option-pushpop.s
+++ b/llvm/test/MC/RISCV/option-pushpop.s
@@ -20,7 +20,7 @@
# where .option pop was last used.
# CHECK-INST: call foo
-# CHECK-RELOC: R_RISCV_CALL foo 0x0
+# CHECK-RELOC: R_RISCV_CALL_PLT foo 0x0
# CHECK-RELOC-NOT: R_RISCV_RELAX - 0x0
call foo
@@ -35,7 +35,7 @@ addi s0, sp, 1020
.option relax
# CHECK-INST: .option relax
# CHECK-INST: call bar
-# CHECK-RELOC-NEXT: R_RISCV_CALL bar 0x0
+# CHECK-RELOC-NEXT: R_RISCV_CALL_PLT bar 0x0
# CHECK-RELOC-NEXT: R_RISCV_RELAX - 0x0
call bar
@@ -57,14 +57,14 @@ addi s0, sp, 1020
addi s0, sp, 1020
# CHECK-INST: call bar
-# CHECK-RELOC-NEXT: R_RISCV_CALL bar 0x0
+# CHECK-RELOC-NEXT: R_RISCV_CALL_PLT bar 0x0
# CHECK-RELOC-NEXT: R_RISCV_RELAX - 0x0
call bar
.option pop # Pop relax=false, rvc=false
# CHECK-INST: .option pop
# CHECK-INST: call baz
-# CHECK-RELOC: R_RISCV_CALL baz 0x0
+# CHECK-RELOC: R_RISCV_CALL_PLT baz 0x0
# CHECK-RELOC-NOT: R_RISCV_RELAX - 0x0
call baz
diff --git a/llvm/test/MC/RISCV/option-relax.s b/llvm/test/MC/RISCV/option-relax.s
index 7a231d152f766..8a6a929ad0241 100644
--- a/llvm/test/MC/RISCV/option-relax.s
+++ b/llvm/test/MC/RISCV/option-relax.s
@@ -20,7 +20,7 @@
# CHECK-INST: .option norelax
# CHECK-INST: call foo
-# CHECK-RELOC: R_RISCV_CALL foo 0x0
+# CHECK-RELOC: R_RISCV_CALL_PLT foo 0x0
# CHECK-RELOC-NOT: R_RISCV_RELAX - 0x0
call foo
@@ -37,7 +37,7 @@ beq s1, s1, .L1
# CHECK-INST: .option relax
# CHECK-INST: call bar
-# CHECK-RELOC-NEXT: R_RISCV_CALL bar 0x0
+# CHECK-RELOC-NEXT: R_RISCV_CALL_PLT bar 0x0
# CHECK-RELOC-NEXT: R_RISCV_RELAX - 0x0
call bar
@@ -53,7 +53,7 @@ beq s1, s1, .L1
# CHECK-INST: .option norelax
# CHECK-INST: call baz
-# CHECK-RELOC-NEXT: R_RISCV_CALL baz 0x0
+# CHECK-RELOC-NEXT: R_RISCV_CALL_PLT baz 0x0
# CHECK-RELOC-NOT: R_RISCV_RELAX - 0x0
call baz
diff --git a/llvm/test/MC/RISCV/pseudo-jump.s b/llvm/test/MC/RISCV/pseudo-jump.s
index 0a2e2faa1b65a..8c72547c5bcc2 100644
--- a/llvm/test/MC/RISCV/pseudo-jump.s
+++ b/llvm/test/MC/RISCV/pseudo-jump.s
@@ -8,7 +8,7 @@
.long foo
jump foo, x31
-# RELOC: R_RISCV_CALL foo 0x0
+# RELOC: R_RISCV_CALL_PLT foo 0x0
# INSTR: auipc t6, 0
# INSTR: jr t6
# FIXUP: fixup A - offset: 0, value: foo, kind: fixup_riscv_call
@@ -16,7 +16,7 @@ jump foo, x31
# Ensure that jumps to symbols whose names coincide with register names work.
jump zero, x1
-# RELOC: R_RISCV_CALL zero 0x0
+# RELOC: R_RISCV_CALL_PLT zero 0x0
# INSTR: auipc ra, 0
# INSTR: ret
# FIXUP: fixup A - offset: 0, value: zero, kind: fixup_riscv_call
diff --git a/llvm/test/MC/RISCV/tail-call.s b/llvm/test/MC/RISCV/tail-call.s
index 63e9d420b112e..3670c7749ab17 100644
--- a/llvm/test/MC/RISCV/tail-call.s
+++ b/llvm/test/MC/RISCV/tail-call.s
@@ -15,12 +15,12 @@
.long foo
tail foo
-# RELOC: R_RISCV_CALL foo 0x0
+# RELOC: R_RISCV_CALL_PLT foo 0x0
# INSTR: auipc t1, 0
# INSTR: jr t1
# FIXUP: fixup A - offset: 0, value: foo, kind:
tail bar
-# RELOC: R_RISCV_CALL bar 0x0
+# RELOC: R_RISCV_CALL_PLT bar 0x0
# INSTR: auipc t1, 0
# INSTR: jr t1
# FIXUP: fixup A - offset: 0, value: bar, kind:
@@ -29,19 +29,19 @@ tail bar
# work.
tail zero
-# RELOC: R_RISCV_CALL zero 0x0
+# RELOC: R_RISCV_CALL_PLT zero 0x0
# INSTR: auipc t1, 0
# INSTR: jr t1
# FIXUP: fixup A - offset: 0, value: zero, kind:
tail f1
-# RELOC: R_RISCV_CALL f1 0x0
+# RELOC: R_RISCV_CALL_PLT f1 0x0
# INSTR: auipc t1, 0
# INSTR: jr t1
# FIXUP: fixup A - offset: 0, value: f1, kind:
tail ra
-# RELOC: R_RISCV_CALL ra 0x0
+# RELOC: R_RISCV_CALL_PLT ra 0x0
# INSTR: auipc t1, 0
# INSTR: jr t1
# FIXUP: fixup A - offset: 0, value: ra, kind:
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