[PATCH] D133723: [AMDGPU][GFX11] Use VGPR_32_F128 for VOP1,2,C

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:2880
                                                 unsigned Idx) const {
+  if (Idx == AMDGPU::RegisterPressureSets::VGPR_32_F128) {
+    return getRegPressureLimit(&AMDGPU::VGPR_32_F128RegClass,
----------------
Joe_Nash wrote:
> rampitec wrote:
> > You probably do not need PSet for it, it is not handled anywhere.
> I don't fully understand this, but MachineLICMBase calls getRegPressureSetLimit and will hit llvm_unreachable without the PSet for VGPR_32_F128
Add `let GeneratePressureSet = 0;` to the RC definition and remove this.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133723/new/

https://reviews.llvm.org/D133723