[PATCH] D133736: [RISCV] Teach lowerVECTOR_SHUFFLE to recognize some shuffles as vnsrl.

[Philip Reames via Phabricator via llvm-commits]

reames accepted this revision.
reames added a comment.
This revision is now accepted and ready to land.

LGTM

A couple thoughts for possible generalization.

I think we can extract any Nth element where N is a power of two, and N * sizeof(Element) is less than equal ELEN.  So, every 8th element in an i8 vector for instance.

We should be able to handle a sequence with a non-zero/non-one base.  This requires an extra slidedown to align the sequence.

As noted, we can handle undefs.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133736/new/

https://reviews.llvm.org/D133736