[PATCH] D133708: [LegalizeTypes][NVPTX] Remove extra compare from fallback code for ISD::ADD in ExpandIntRes_ADDSUB.

[Sanjay Patel via Phabricator via llvm-commits]

spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.

LGTM



================
Comment at: llvm/test/CodeGen/NVPTX/add-sub-128bit.ll:10
 ; NOCARRY:        add.s64
-; NOCARRY-NEXT:   setp.lt.u64
+; NOCARRY-NEXT:   add.s64
 ; NOCARRY-NEXT:   setp.lt.u64
----------------
craig.topper wrote:
> There were previously two add.s64 after the last selp.s64 but the test was only checking for one of them. With the code reduced, one of those adds is scheduled earlier.
Better to auto-gen the full output, so that's visible?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133708/new/

https://reviews.llvm.org/D133708