[PATCH] D133543: [PowerPC][NFC] Add base test case to show redundant spill of vector registers

[Kai Luo via Phabricator via llvm-commits]

lkail added inline comments.


================
Comment at: llvm/test/CodeGen/PowerPC/aix32-vector-pair-cc-spills.ll:6
+
+; CHECK: name: foo
+; CHECK-NOT: spill-slot
----------------
You can use `CHECK-LABEL` here.


================
Comment at: llvm/test/CodeGen/PowerPC/aix32-vector-pair-cc-spills.ll:21
+
+; CHECK-VEXT: name: foo
+; CHECK-VEXT-NOT: spill-slot
----------------
ditto.


================
Comment at: llvm/test/CodeGen/PowerPC/aix32-vector-pair-cc-spills.ll:41
+
+; CHECK: name: spill
+; CHECK-NOT: spill-slot
----------------
ditto.


================
Comment at: llvm/test/CodeGen/PowerPC/aix32-vector-pair-cc-spills.ll:56
+
+; CHECK-VEXT: name: spill
+; CHECK-VEXT: spill-slot
----------------
ditto.


================
Comment at: llvm/test/CodeGen/PowerPC/aix64-vector-pair-cc-spills.ll:7
+; Error pattern will be fixed in https://reviews.llvm.org/D133466
+; CHECK: name: foo
+; CHECK: spill-slot
----------------
ditto.


================
Comment at: llvm/test/CodeGen/PowerPC/aix64-vector-pair-cc-spills.ll:33
+
+; CHECK-VEXT: name: foo
+; CHECK-VEXT-NOT: spill-slot
----------------
ditto.


================
Comment at: llvm/test/CodeGen/PowerPC/aix64-vector-pair-cc-spills.ll:54
+; Error pattern will be fixed in https://reviews.llvm.org/D133466
+; CHECK: name: spill
+; CHECK: spill-slot
----------------
ditto.


================
Comment at: llvm/test/CodeGen/PowerPC/aix64-vector-pair-cc-spills.ll:80
+
+; CHECK-VEXT: name: spill
+; CHECK-VEXT: spill-slot
----------------
ditto.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133543/new/

https://reviews.llvm.org/D133543