[llvm] 481a32f - Bug fix on stable hash calculation for machine operands RegisterMask and RegisterLiveOut

[Kyungwoo Lee via llvm-commits]

Author: YongKang Zhu
Date: 2022-09-12T13:25:04-07:00
New Revision: 481a32f58745a1216589c5263772030e16011a45

URL: https://github.com/llvm/llvm-project/commit/481a32f58745a1216589c5263772030e16011a45
DIFF: https://github.com/llvm/llvm-project/commit/481a32f58745a1216589c5263772030e16011a45.diff

LOG: Bug fix on stable hash calculation for machine operands RegisterMask and RegisterLiveOut

MachineOperand::getRegMask() returns a pointer to register mask.  We should hash the raw content of register mask instead of its pointer.

Reviewed By: kyulee

Differential Revision: https://reviews.llvm.org/D133637

Added: 
    

Modified: 
    llvm/include/llvm/CodeGen/MachineOperand.h
    llvm/lib/CodeGen/MachineOperand.cpp
    llvm/lib/CodeGen/MachineStableHash.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/CodeGen/MachineOperand.h b/llvm/include/llvm/CodeGen/MachineOperand.h
index c88e72cdc1d9..9feab9e0ca06 100644
--- a/llvm/include/llvm/CodeGen/MachineOperand.h
+++ b/llvm/include/llvm/CodeGen/MachineOperand.h
@@ -641,6 +641,10 @@ class MachineOperand {
     return Contents.RegMask;
   }
 
+  /// Return the size of regmask array if we are able to figure it out from
+  /// this operand. Return zero otherwise.
+  unsigned getRegMaskSize() const;
+
   /// Returns number of elements needed for a regmask array.
   static unsigned getRegMaskSize(unsigned NumRegs) {
     return (NumRegs + 31) / 32;

diff  --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp
index 46ad1de78c46..7a85eaf95fd5 100644
--- a/llvm/lib/CodeGen/MachineOperand.cpp
+++ b/llvm/lib/CodeGen/MachineOperand.cpp
@@ -279,6 +279,17 @@ void MachineOperand::ChangeToRegister(Register Reg, bool isDef, bool isImp,
     RegInfo->addRegOperandToUseList(this);
 }
 
+/// getRegMaskSize - Return the size of regmask array if we are able to figure
+/// it out from this operand. Return zero otherwise.
+unsigned MachineOperand::getRegMaskSize() const {
+  if (const MachineFunction *MF = getMFIfAvailable(*this)) {
+    const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
+    unsigned RegMaskSize = (TRI->getNumRegs() + 31) / 32;
+    return RegMaskSize;
+  }
+  return 0;
+}
+
 /// isIdenticalTo - Return true if this operand is identical to the specified
 /// operand. Note that this should stay in sync with the hash_value overload
 /// below.
@@ -322,11 +333,8 @@ bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
     if (RegMask == OtherRegMask)
       return true;
 
-    if (const MachineFunction *MF = getMFIfAvailable(*this)) {
-      // Calculate the size of the RegMask
-      const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
-      unsigned RegMaskSize = (TRI->getNumRegs() + 31) / 32;
-
+    const unsigned RegMaskSize = getRegMaskSize();
+    if (RegMaskSize != 0) {
       // Deep compare of the two RegMasks
       return std::equal(RegMask, RegMask + RegMaskSize, OtherRegMask);
     }

diff  --git a/llvm/lib/CodeGen/MachineStableHash.cpp b/llvm/lib/CodeGen/MachineStableHash.cpp
index b546a5082b07..30c5404750e1 100644
--- a/llvm/lib/CodeGen/MachineStableHash.cpp
+++ b/llvm/lib/CodeGen/MachineStableHash.cpp
@@ -119,8 +119,20 @@ stable_hash llvm::stableHashValue(const MachineOperand &MO) {
                         stable_hash_combine_string(MO.getSymbolName()));
 
   case MachineOperand::MO_RegisterMask:
-  case MachineOperand::MO_RegisterLiveOut:
-    return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getRegMask());
+  case MachineOperand::MO_RegisterLiveOut: {
+    const uint32_t *RegMask = MO.getRegMask();
+    const unsigned RegMaskSize = MO.getRegMaskSize();
+
+    if (RegMaskSize != 0) {
+      std::vector<llvm::stable_hash> RegMaskHashes(RegMask,
+                                                   RegMask + RegMaskSize);
+      return hash_combine(MO.getType(), MO.getTargetFlags(),
+                          stable_hash_combine_array(RegMaskHashes.data(),
+                                                    RegMaskHashes.size()));
+    }
+
+    return hash_combine(MO.getType(), MO.getTargetFlags());
+  }
 
   case MachineOperand::MO_ShuffleMask: {
     std::vector<llvm::stable_hash> ShuffleMaskHashes;