[PATCH] D133552: [RISCV] Add cost model for integer and float vector arithmetic instructions.

Philip Reames via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 12 12:41:42 PDT 2022


reames requested changes to this revision.
reames added inline comments.
This revision now requires changes to proceed.


================
Comment at: llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp:791
+  case ISD::FNEG:
+    return LT.first * 1;
+
----------------
These costs are incorrect when e.g. a half is used without Zfh.


================
Comment at: llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp:798
+  case ISD::FDIV: {
+    unsigned VL = getEstimatedVLFor(cast<VectorType>(Ty));
+    return LT.first * VL;
----------------
This doesn't match the cost of any hardware I'm aware of.  You need to justify why this is correct and probably we need some cpu flag if you know of hardware which behaves like this.  


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133552/new/

https://reviews.llvm.org/D133552



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