[PATCH] D133688: [RISCV] Lower BUILD_VECTOR to RISCVISD::VID_VL if it is floating-point type.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 12 12:06:41 PDT 2022


craig.topper added a comment.

In D133688#3784603 <https://reviews.llvm.org/D133688#3784603>, @reames wrote:

> In D133688#3784585 <https://reviews.llvm.org/D133688#3784585>, @craig.topper wrote:
>
>> In D133688#3784547 <https://reviews.llvm.org/D133688#3784547>, @reames wrote:
>>
>>> High level question - why approach this as checking to see if the float is representable as an integer instead of just using the bit-pattern of the float?  Using the bit-pattern would seem to match the vid sequence with a large base offset.  If so, we could either emit the base as a constant, or leverage the float to int conversion if within the sequence is in the representable range.
>>
>> I didn't follow this. Doesn't normalization of the mantissa make the exponents varied so they wouldn't be linear?
>
> It might be this is the answer to my question.  Is there a range of float values where the step is non-constant as integer, but constant as a float?
>
> 1.0 = 0x3f800000
> 2.0 = 0x40000000
> 3.0 = 0x40400000
>
> The delta here is 0x00400000.  At least in this range, using a step of 0x00400000 and base of 0x3f800000 would seem to give the right result.

Doesn't the pattern break when you hit 5.0
4.0 = 0x40800000
5.0 = 0x40a00000 <- this is only 0x00200000 away from 4.


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