[PATCH] D133700: [PowerPC] Exploit xxperm, check for dead vectors and substitute vperm with xxperm

Maryam Moghadas via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 12 07:29:59 PDT 2022


maryammo created this revision.
Herald added subscribers: shchenz, kbarton, hiraditya, nemanjai.
Herald added a project: All.
maryammo requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

vperm instruction requires the data to be in the Altivec registers, if one of
the vector operands is not used after this vperm instruction then it can be
substituted by xxperm which doubles the number of available registers.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D133700

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/lib/Target/PowerPC/PPCInstrAltivec.td
  llvm/lib/Target/PowerPC/PPCInstrVSX.td
  llvm/test/CodeGen/PowerPC/aix-p9-insert-extract.ll
  llvm/test/CodeGen/PowerPC/aix-p9-xxinsertw-xxextractuw.ll
  llvm/test/CodeGen/PowerPC/build-vector-tests.ll
  llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
  llvm/test/CodeGen/PowerPC/extract-and-store.ll
  llvm/test/CodeGen/PowerPC/load-and-splat.ll
  llvm/test/CodeGen/PowerPC/load-shuffle-and-shuffle-store.ll
  llvm/test/CodeGen/PowerPC/p10-vector-rotate.ll
  llvm/test/CodeGen/PowerPC/p9-vinsert-vextract.ll
  llvm/test/CodeGen/PowerPC/ppc-shufflevector-combine.ll
  llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll
  llvm/test/CodeGen/PowerPC/pre-inc-disable.ll
  llvm/test/CodeGen/PowerPC/srem-vector-lkk.ll
  llvm/test/CodeGen/PowerPC/urem-vector-lkk.ll
  llvm/test/CodeGen/PowerPC/v16i8_scalar_to_vector_shuffle.ll
  llvm/test/CodeGen/PowerPC/v2i64_scalar_to_vector_shuffle.ll
  llvm/test/CodeGen/PowerPC/v4i32_scalar_to_vector_shuffle.ll
  llvm/test/CodeGen/PowerPC/v8i16_scalar_to_vector_shuffle.ll
  llvm/test/CodeGen/PowerPC/vec-itofp.ll
  llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i8_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i8_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
  llvm/test/CodeGen/PowerPC/vec_extract_p9.ll
  llvm/test/CodeGen/PowerPC/vec_int_ext.ll
  llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D133700.459454.patch
Type: text/x-patch
Size: 285010 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220912/1582cc71/attachment-0001.bin>


More information about the llvm-commits mailing list