[PATCH] D133421: [AArch64] break non-temporal loads over 256 into 256-loads and a smaller load

[Zain Jaffal via Phabricator via llvm-commits]

zjaffal updated this revision to Diff 459418.
zjaffal added a comment.

1. Change Align to use PtrOffset
2. Make sure that `performTBISimplification` optimisation can run
3. Add TokenFactor node


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133421/new/

https://reviews.llvm.org/D133421

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/nontemporal-load.ll

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