[PATCH] D133473: [WebAssembly] Improve codegen for shuffles with undefined lane indices

Petr Penzin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Sep 11 22:34:29 PDT 2022


penzn added a comment.

In D133473#3781884 <https://reviews.llvm.org/D133473#3781884>, @tlively wrote:

> The code looks good, but I don't know much about native SIMD. Is this strictly better for engine-side codegen on all platforms? LGTM if so.

Yes, it is, that's why maybe expanding on description/comments would be good :)

Filling undefined lanes with 0's would effectively turn the shuffle into a byte shuffle, which is more expensive than "coarser" shuffles.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133473/new/

https://reviews.llvm.org/D133473



More information about the llvm-commits mailing list