[PATCH] D133652: [NFC][msan] Simplify llvm.masked.load origin code
Vitaly Buka via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Sep 10 17:15:48 PDT 2022
vitalybuka created this revision.
Herald added subscribers: Enna1, hiraditya.
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vitalybuka requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D133652
Files:
llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
llvm/test/Instrumentation/MemorySanitizer/masked-store-load.ll
Index: llvm/test/Instrumentation/MemorySanitizer/masked-store-load.ll
===================================================================
--- llvm/test/Instrumentation/MemorySanitizer/masked-store-load.ll
+++ llvm/test/Instrumentation/MemorySanitizer/masked-store-load.ll
@@ -133,19 +133,13 @@
; ORIGINS-NEXT: [[TMP8:%.*]] = sub <4 x i1> zeroinitializer, [[MASK]]
; ORIGINS-NEXT: [[TMP9:%.*]] = sext <4 x i1> [[TMP8]] to <4 x i64>
; ORIGINS-NEXT: [[TMP10:%.*]] = and <4 x i64> [[TMP0]], [[TMP9]]
-; ORIGINS-NEXT: [[TMP11:%.*]] = extractelement <4 x i64> [[TMP10]], i32 0
-; ORIGINS-NEXT: [[TMP12:%.*]] = extractelement <4 x i64> [[TMP10]], i32 1
-; ORIGINS-NEXT: [[TMP13:%.*]] = or i64 [[TMP11]], [[TMP12]]
-; ORIGINS-NEXT: [[TMP14:%.*]] = extractelement <4 x i64> [[TMP10]], i32 2
-; ORIGINS-NEXT: [[TMP15:%.*]] = or i64 [[TMP13]], [[TMP14]]
-; ORIGINS-NEXT: [[TMP16:%.*]] = extractelement <4 x i64> [[TMP10]], i32 3
-; ORIGINS-NEXT: [[TMP17:%.*]] = or i64 [[TMP15]], [[TMP16]]
-; ORIGINS-NEXT: [[TMP18:%.*]] = icmp ne i64 [[TMP17]], 0
-; ORIGINS-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP7]], align 4
-; ORIGINS-NEXT: [[TMP20:%.*]] = select i1 [[TMP18]], i32 [[TMP1]], i32 [[TMP19]]
+; ORIGINS-NEXT: [[TMP11:%.*]] = bitcast <4 x i64> [[TMP10]] to i256
+; ORIGINS-NEXT: [[_MSCMP:%.*]] = icmp ne i256 [[TMP11]], 0
+; ORIGINS-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP7]], align 4
+; ORIGINS-NEXT: [[TMP13:%.*]] = select i1 [[_MSCMP]], i32 [[TMP1]], i32 [[TMP12]]
; ORIGINS-NEXT: [[X:%.*]] = call <4 x double> @llvm.masked.load.v4f64.p0v4f64(<4 x double>* [[P]], i32 1, <4 x i1> [[MASK]], <4 x double> [[V:%.*]])
; ORIGINS-NEXT: store <4 x i64> [[_MSMASKEDLD]], <4 x i64>* bitcast ([100 x i64]* @__msan_retval_tls to <4 x i64>*), align 8
-; ORIGINS-NEXT: store i32 [[TMP20]], i32* @__msan_retval_origin_tls, align 4
+; ORIGINS-NEXT: store i32 [[TMP13]], i32* @__msan_retval_origin_tls, align 4
; ORIGINS-NEXT: ret <4 x double> [[X]]
;
entry:
Index: llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
===================================================================
--- llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
+++ llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
@@ -3316,18 +3316,10 @@
Value *MaskedPassThruShadow = IRB.CreateAnd(
getShadow(PassThru), IRB.CreateSExt(IRB.CreateNeg(Mask), ShadowTy));
- Value *Acc = IRB.CreateExtractElement(
- MaskedPassThruShadow, ConstantInt::get(IRB.getInt32Ty(), 0));
- for (int i = 1, N = cast<FixedVectorType>(PassThru->getType())
- ->getNumElements();
- i < N; ++i) {
- Value *More = IRB.CreateExtractElement(
- MaskedPassThruShadow, ConstantInt::get(IRB.getInt32Ty(), i));
- Acc = IRB.CreateOr(Acc, More);
- }
+ Value *ConvertedShadow =
+ convertShadowToScalar(MaskedPassThruShadow, IRB);
+ Value *NotNull = convertToBool(ConvertedShadow, IRB, "_mscmp");
- Value *NotNull =
- IRB.CreateICmpNE(Acc, Constant::getNullValue(Acc->getType()));
Value *PtrOrigin = IRB.CreateLoad(MS.OriginTy, OriginPtr);
Value *Origin =
IRB.CreateSelect(NotNull, getOrigin(PassThru), PtrOrigin);
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