[PATCH] D133593: [AMDGPU] Always select s_cselect_b32 for uniform 'select' SDNode

[Alexander via Phabricator via llvm-commits]

alex-t created this revision.
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alex-t requested review of this revision.
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Herald added a project: LLVM.

This patch contains changes necessary to carry physical condition register (SCC) dependencies through the SDNode scheduler. This allows avoiding inserting an SCC copy between each definition and use.


https://reviews.llvm.org/D133593

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/MachineRegisterInfo.cpp
  llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/SIISelLowering.h
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/lib/Target/AMDGPU/SOPInstructions.td
  llvm/test/CodeGen/AMDGPU/32-bit-local-address-space.ll
  llvm/test/CodeGen/AMDGPU/addrspacecast.ll
  llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
  llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
  llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
  llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
  llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
  llvm/test/CodeGen/AMDGPU/extract_vector_elt-f64.ll
  llvm/test/CodeGen/AMDGPU/extract_vector_elt-i64.ll
  llvm/test/CodeGen/AMDGPU/fceil64.ll
  llvm/test/CodeGen/AMDGPU/frem.ll
  llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll
  llvm/test/CodeGen/AMDGPU/idiv-licm.ll
  llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
  llvm/test/CodeGen/AMDGPU/indirect-call-known-callees.ll
  llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
  llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
  llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
  llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
  llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
  llvm/test/CodeGen/AMDGPU/mad_uint24.ll
  llvm/test/CodeGen/AMDGPU/sad.ll
  llvm/test/CodeGen/AMDGPU/sdiv.ll
  llvm/test/CodeGen/AMDGPU/sdiv64.ll
  llvm/test/CodeGen/AMDGPU/select-constant-cttz.ll
  llvm/test/CodeGen/AMDGPU/select-opt.ll
  llvm/test/CodeGen/AMDGPU/select-vectors.ll
  llvm/test/CodeGen/AMDGPU/select64.ll
  llvm/test/CodeGen/AMDGPU/selectcc.ll
  llvm/test/CodeGen/AMDGPU/setcc64.ll
  llvm/test/CodeGen/AMDGPU/shift-i128.ll
  llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
  llvm/test/CodeGen/AMDGPU/srem64.ll
  llvm/test/CodeGen/AMDGPU/trunc.ll
  llvm/test/CodeGen/AMDGPU/udiv.ll
  llvm/test/CodeGen/AMDGPU/udiv64.ll
  llvm/test/CodeGen/AMDGPU/udivrem.ll
  llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
  llvm/test/CodeGen/AMDGPU/urem64.ll
  llvm/test/CodeGen/AMDGPU/vselect.ll