[PATCH] D133464: [WIP][BPF] Add sext load instructions

[Yonghong Song via Phabricator via llvm-commits]

yonghong-song added a comment.

All major architectures support sign extension load (x64, arm64, sparc, webassembly, lanai, etc.)

Yes, x64/arm64 support register->register sign extension (https://www.felixcloutier.com/x86/movsx:movsxd, https://developer.arm.com/documentation/dui0801/g/A64-General-Instructions/SXTW) let me take a look.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D133464/new/

https://reviews.llvm.org/D133464