[PATCH] D131260: [DAG] select Cond, -1, C --> or (sext Cond), C if Cond is MVT::i1
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 9 08:04:02 PDT 2022
RKSimon added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:10264
+ !TLI.isOperationLegalOrCustom(ISD::SELECT_CC, VT)) &&
+ TLI.convertSelectOfConstantsToMath(VT)) {
// For any constants that differ by 1, we can transform the select into an
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Maybe adjust convertSelectOfConstantsToMath to take the Cond opcode as another argument instead?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D131260/new/
https://reviews.llvm.org/D131260
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