[PATCH] D133433: [AArch64-SVE]: lower masked load/store of 128-bit fixed-width vectors

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added a comment.

@Matt: This work is orthogonal to https://github.com/llvm/llvm-project/issues/56412.  When in streaming mode gather/scatter instructions are not available so we'll have code to mark the associated intrinsics as illegal and thus they'll be scalarised before reaching code gen.  This doesn't take away the importance of the GitHub issue, which will be resolved when we specifically enable gather/scatter code generation for 128-bit vectors.



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Comment at: llvm/lib/Target/AArch64/AArch64Subtarget.cpp:69
+static cl::opt<bool>
+    ForceSVEWhenStreamingCompatible("force-sve-when-streaming-compatible",
+                                    cl::init(false), cl::Hidden);
----------------
Can this be "force-streaming-compatible-mode"? which I believe better reflects your intent.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D133433/new/

https://reviews.llvm.org/D133433