[PATCH] D133495: [AArch64] Lower vector trunc using tbl.

[Florian Hahn via Phabricator via llvm-commits]

fhahn created this revision.
fhahn added reviewers: t.p.northover, ab, dmgreen, paquette, SjoerdMeijer.
Herald added subscribers: hiraditya, kristof.beyls.
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fhahn requested review of this revision.
Herald added a project: LLVM.

Similar to using tbl to lower vector ZExts, tbl4 can be used to lower
vector truncates.

The initial version support i32->i8 conversions.

Depends on D120571 <https://reviews.llvm.org/D120571>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D133495

Files:
  llvm/lib/CodeGen/CodeGenPrepare.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/trunc-to-tbl.ll

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