[llvm] 52f7eb3 - [LICM] Add test for sret with conditional store (NFC)

[Nikita Popov via llvm-commits]

Author: Nikita Popov
Date: 2022-09-08T14:53:06+02:00
New Revision: 52f7eb315177b45c730a8184a60ec8d8becb2939

URL: https://github.com/llvm/llvm-project/commit/52f7eb315177b45c730a8184a60ec8d8becb2939
DIFF: https://github.com/llvm/llvm-project/commit/52f7eb315177b45c730a8184a60ec8d8becb2939.diff

LOG: [LICM] Add test for sret with conditional store (NFC)

Added: 
    

Modified: 
    llvm/test/Transforms/LICM/scalar-promote.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/LICM/scalar-promote.ll b/llvm/test/Transforms/LICM/scalar-promote.ll
index 8304479f4f238..760d1397142ba 100644
--- a/llvm/test/Transforms/LICM/scalar-promote.ll
+++ b/llvm/test/Transforms/LICM/scalar-promote.ll
@@ -883,6 +883,38 @@ exit:
   ret void
 }
 
+; TODO: The store can be promoted, as sret memory is writable.
+define void @sret_cond_store(i32* sret(i32) noalias %ptr) {
+; CHECK-LABEL: @sret_cond_store(
+; CHECK-NEXT:    [[PTR_PROMOTED:%.*]] = load i32, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[V_INC1:%.*]] = phi i32 [ [[V_INC:%.*]], [[LOOP_LATCH:%.*]] ], [ [[PTR_PROMOTED]], [[TMP0:%.*]] ]
+; CHECK-NEXT:    [[C:%.*]] = icmp ult i32 [[V_INC1]], 10
+; CHECK-NEXT:    br i1 [[C]], label [[LOOP_LATCH]], label [[EXIT:%.*]]
+; CHECK:       loop.latch:
+; CHECK-NEXT:    [[V_INC]] = add i32 [[V_INC1]], 1
+; CHECK-NEXT:    store i32 [[V_INC]], i32* [[PTR]], align 4
+; CHECK-NEXT:    br label [[LOOP]]
+; CHECK:       exit:
+; CHECK-NEXT:    ret void
+;
+  br label %loop
+
+loop:
+  %v = load i32, i32* %ptr
+  %c = icmp ult i32 %v, 10
+  br i1 %c, label %loop.latch, label %exit
+
+loop.latch:
+  %v.inc = add i32 %v, 1
+  store i32 %v.inc, i32* %ptr
+  br label %loop
+
+exit:
+  ret void
+}
+
 !0 = !{!4, !4, i64 0}
 !1 = !{!"omnipotent char", !2}
 !2 = !{!"Simple C/C++ TBAA"}