[PATCH] D133327: [AArch64][GlobalISel] When lowering signext i1 parameters, don't zero-extend to s8 first.
Amara Emerson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 8 01:40:24 PDT 2022
aemerson added a comment.
In D133327#3776446 <https://reviews.llvm.org/D133327#3776446>, @tschuett wrote:
> In D133327#3776434 <https://reviews.llvm.org/D133327#3776434>, @aemerson wrote:
>
>> In D133327#3775081 <https://reviews.llvm.org/D133327#3775081>, @tschuett wrote:
>>
>>> You said `We were generating different code to SelectionDAG,` Is there a test file that shows the generated code of SelectionDAG and GlobalIsel?
>>
>> I added run lines to bool-ext-inc.ll and the tests that were used to generate the MIR tests too.
>
> Thanks! The SelectionDAG code seems to be shorter (#instructions).
Yes, code quality there needs work still.
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https://reviews.llvm.org/D133327/new/
https://reviews.llvm.org/D133327
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