[PATCH] D133441: [SLP] Look ahead for mutual horizontal reductions.

[Vasileios Porpodas via Phabricator via llvm-commits]

vporpo added a comment.

Well, this issue shows up in other cases too, not just reductions, see for example https://reviews.llvm.org/D132773. Ideally I would prefer a more generic solution rather than workarounds for each specific case because each workaround is rather limited. For example this patch won't help vectorize the code if we have more than two reductions, or if the external users are not reductions like the stores in the following example:

  define i64 @foo(ptr %ptr.0) {
  entry:
    %ptr.1 = getelementptr inbounds i32, ptr %ptr.0, i64 1
    %ptr.2 = getelementptr inbounds i32, ptr %ptr.0, i64 2
    %ptr.3 = getelementptr inbounds i32, ptr %ptr.0, i64 3
  
    %0 = load i32, ptr %ptr.0, align 4, !tbaa !5
    %1 = load i32, ptr %ptr.1, align 4, !tbaa !5
    %2 = load i32, ptr %ptr.2, align 4, !tbaa !5
    %3 = load i32, ptr %ptr.3, align 4, !tbaa !5
  
    %add.1 = add i32 %1, %0
    %add.2 = add i32 %2, %add.1
    %add.3 = add i32 %3, %add.2
  
    %mul = mul i32 %0, %0
    %mul.1 = mul i32 %1, %1
    %mul.2 = mul i32 %2, %2
    %mul.3 = mul i32 %3, %3
  
    %add5.1 = add i32 %mul.1, %mul
    %add5.2 = add i32 %mul.2, %add5.1
    %add5.3 = add i32 %mul.3, %add5.2
  
    ; Non-reduction external users
    store i32 %0, ptr %ptr.0
    store i32 %1, ptr %ptr.1
    store i32 %2, ptr %ptr.2
    store i32 %3, ptr %ptr.3
  
    %conv = zext i32 %add.3 to i64
    %conv6 = zext i32 %add5.3 to i64
    %shl = shl nuw i64 %conv6, 32
    %add7 = or i64 %shl, %conv
    ret i64 %add7
  }



================
Comment at: llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp:2637
+
+    bool HasMutualReduction;
   };
----------------
Perhaps we could name this `SkipCost` or something along those lines, because that way we can reuse it for other similar workarounds?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D133441/new/

https://reviews.llvm.org/D133441