[PATCH] D133327: [AArch64][GlobalISel] When lowering signext i1 parameters, don't zero-extend to s8 first.

[Jessica Paquette via Phabricator via llvm-commits]

paquette added inline comments.


================
Comment at: llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp:387
+      if (MRI.getType(CurVReg).getSizeInBits() == 1 &&
+          !CurArgInfo.Flags[0].isSExt() && !CurArgInfo.Flags[0].isZExt()) {
         CurVReg = MIRBuilder.buildZExt(LLT::scalar(8), CurVReg).getReg(0);
----------------
should we just pull `CurArgInfo.Flags[0]` out into a variable?


================
Comment at: llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp:573
 
-      if (!OrigArg.Flags[0].isZExt()) {
+      if (!OrigArg.Flags[0].isZExt() && !OrigArg.Flags[0].isSExt()) {
         // Lower i1 argument as i8, and insert AssertZExt + Trunc later.
----------------
ditto with `OrigArg.Flags[0]`?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133327/new/

https://reviews.llvm.org/D133327