[PATCH] D130076: [llvm/CodeGen] Enable the ExpandLargeDivRem pass for X86, Arm and AArch64
Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 6 07:32:24 PDT 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG2090e85fee9b: [llvm/CodeGen] Enable the ExpandLargeDivRem pass for X86, Arm and AArch64 (authored by Matthias Gehre <matthias.gehre at xilinx.com>).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D130076/new/
https://reviews.llvm.org/D130076
Files:
llvm/include/llvm/Analysis/TargetTransformInfo.h
llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
llvm/lib/Analysis/TargetTransformInfo.cpp
llvm/lib/CodeGen/ExpandLargeDivRem.cpp
llvm/lib/CodeGen/TargetPassConfig.cpp
llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
llvm/lib/Target/ARM/ARMTargetTransformInfo.h
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/lib/Target/X86/X86TargetTransformInfo.h
llvm/test/CodeGen/AArch64/O0-pipeline.ll
llvm/test/CodeGen/AArch64/O3-pipeline.ll
llvm/test/CodeGen/AArch64/udivmodei5.ll
llvm/test/CodeGen/ARM/O3-pipeline.ll
llvm/test/CodeGen/ARM/udivmodei5.ll
llvm/test/CodeGen/X86/O0-pipeline.ll
llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
llvm/test/CodeGen/X86/i128-sdiv.ll
llvm/test/CodeGen/X86/i128-udiv.ll
llvm/test/CodeGen/X86/libcall-sret.ll
llvm/test/CodeGen/X86/opt-pipeline.ll
llvm/test/CodeGen/X86/pr38539.ll
llvm/test/CodeGen/X86/udivmodei5.ll
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