[PATCH] D133334: [AMDGPU][MC] Warn when disassembling v_cmpx instructions

[Anshil Gandhi via Phabricator via llvm-commits]

gandhi21299 created this revision.
gandhi21299 added reviewers: dp, Joe_Nash, foad.
gandhi21299 added a project: AMDGPU.
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Based on the discussions in D130345 <https://reviews.llvm.org/D130345>,
AMDGPUDisassembler should emit warnings when v_cmpx*
instructions are disassembled with a non-exec destination,
except when the source is an immediate zero operand.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D133334

Files:
  llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
  llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx.txt


Index: llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx.txt
===================================================================
--- llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx.txt
+++ llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3cx.txt
@@ -908,6 +908,7 @@
 # GFX10: v_cmpx_f_f16_e64 m0, v2                 ; encoding: [0x7e,0x00,0xd8,0xd4,0x7c,0x04,0x02,0x00]
 0x7e,0x00,0xd8,0xd4,0x7c,0x04,0x02,0x00
 
+# GFX10: Warning: unexpected dst value
 # GFX10: v_cmpx_f_f16_e64 s1, v2                 ; encoding: [0x7e,0x00,0xd8,0xd4,0x01,0x04,0x02,0x00]
 0x7e,0x00,0xd8,0xd4,0x01,0x04,0x02,0x00
 
@@ -1067,6 +1068,7 @@
 # GFX10: v_cmpx_f_f64_e64 0.5, v[2:3]            ; encoding: [0x7e,0x00,0x30,0xd4,0xf0,0x04,0x02,0x00]
 0x7e,0x00,0x30,0xd4,0xf0,0x04,0x02,0x00
 
+# GFX10-NOT: Warning: unexpected dst value
 # GFX10: v_cmpx_f_f64_e64 exec, v[1:2]           ; encoding: [0x7e,0x00,0x30,0xd4,0x7e,0x02,0x02,0x00]
 0x7e,0x00,0x30,0xd4,0x7e,0x02,0x02,0x00
 
@@ -1088,6 +1090,7 @@
 # GFX10: v_cmpx_f_f64_e64 v[1:2], -v[2:3]        ; encoding: [0x7e,0x00,0x30,0xd4,0x01,0x05,0x02,0x40]
 0x7e,0x00,0x30,0xd4,0x01,0x05,0x02,0x40
 
+# GFX10: Warning: unexpected dst value
 # GFX10: v_cmpx_f_f64_e64 v[1:2], 0              ; encoding: [0x7e,0x00,0x30,0xd4,0x01,0x01,0x01,0x00]
 0x7e,0x00,0x30,0xd4,0x01,0x01,0x01,0x00
 
Index: llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+++ llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
@@ -706,6 +706,20 @@
   if (Res && ImmLitIdx != -1)
     Res = convertFMAanyK(MI, ImmLitIdx);
 
+  const MCInstrDesc &Desc = MCII->get(MI.getOpcode());
+  auto OpIsZero = [](MCOperand &Op) {
+    return (Op.isImm() && Op.getImm() == 0);
+  };
+  auto OpIsExec = [](MCOperand &Op) {
+    return (Op.isReg() && Op.getReg() == AMDGPU::EXEC);
+  };
+
+  if (isGFX10Plus() && (Desc.TSFlags & SIInstrFlags::VOP3) &&
+      Desc.hasImplicitDefOfPhysReg(AMDGPU::EXEC) && MI.getNumOperands() >= 5 &&
+      !OpIsExec(MI.getOperand(1)) && !OpIsZero(MI.getOperand(3))) {
+    outs() << "Warning: unexpected dst value\n";
+  }
+
   // if the opcode was not recognized we'll assume a Size of 4 bytes
   // (unless there are fewer bytes left)
   Size = Res ? (MaxInstBytesNum - Bytes.size())


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