[PATCH] D133239: [RISCV][MC] Add minimal support for Ztso extension

[Kito Cheng via Phabricator via llvm-commits]

kito-cheng added inline comments.


================
Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp:182
 
+
   MCA.setELFHeaderEFlags(EFlags);
----------------
Extra blank line here


================
Comment at: llvm/lib/Target/RISCV/RISCV.td:464
+
+
 // Feature32Bit exists to mark CPUs that support RV32 to distinquish them from
----------------
nit: maybe just one blank line is enough?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133239/new/

https://reviews.llvm.org/D133239