[PATCH] D133282: [TargetLowering][X86][AMDGPU] Teach expandMUL_LOHI to handle a mix of sign and zero extend.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 5 00:45:23 PDT 2022


craig.topper created this revision.
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If one input of a MUL that needs to expanded is sign extended and
the other is zero extended, we can use an unsigned mul and apply
a correction. If the signed number is negative, we subtract the lower
bits of the zero extended input.

Fixes PR57549, but not in the same way.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D133282

Files:
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/test/CodeGen/AMDGPU/mad_64_32.ll
  llvm/test/CodeGen/X86/extmul128.ll

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