[llvm] 0d1d36c - [X86] Pre-commit tests for D130862. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2022-09-04T21:19:01-07:00
New Revision: 0d1d36cfa6147656521cf7bd3d579eb3cbb99d3b

URL: https://github.com/llvm/llvm-project/commit/0d1d36cfa6147656521cf7bd3d579eb3cbb99d3b
DIFF: https://github.com/llvm/llvm-project/commit/0d1d36cfa6147656521cf7bd3d579eb3cbb99d3b.diff

LOG: [X86] Pre-commit tests for D130862. NFC

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/divide-by-constant.ll
    llvm/test/CodeGen/X86/divmod128.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/divide-by-constant.ll b/llvm/test/CodeGen/X86/divide-by-constant.ll
index f094cbbd3f79a..c487cea77d044 100644
--- a/llvm/test/CodeGen/X86/divide-by-constant.ll
+++ b/llvm/test/CodeGen/X86/divide-by-constant.ll
@@ -934,3 +934,31 @@ entry:
   %rem = udiv i64 %x, 12
   ret i64 %rem
 }
+
+define i64 @urem_i64_3_optsize(i64 %x) nounwind optsize {
+; X32-LABEL: urem_i64_3_optsize:
+; X32:       # %bb.0: # %entry
+; X32-NEXT:    subl $12, %esp
+; X32-NEXT:    pushl $0
+; X32-NEXT:    pushl $3
+; X32-NEXT:    pushl {{[0-9]+}}(%esp)
+; X32-NEXT:    pushl {{[0-9]+}}(%esp)
+; X32-NEXT:    calll __umoddi3
+; X32-NEXT:    addl $28, %esp
+; X32-NEXT:    retl
+;
+; X64-LABEL: urem_i64_3_optsize:
+; X64:       # %bb.0: # %entry
+; X64-NEXT:    movabsq $-6148914691236517205, %rcx # imm = 0xAAAAAAAAAAAAAAAB
+; X64-NEXT:    movq %rdi, %rax
+; X64-NEXT:    mulq %rcx
+; X64-NEXT:    shrq %rdx
+; X64-NEXT:    leaq (%rdx,%rdx,2), %rax
+; X64-NEXT:    subq %rax, %rdi
+; X64-NEXT:    movq %rdi, %rax
+; X64-NEXT:    retq
+entry:
+  %rem = urem i64 %x, 3
+  ret i64 %rem
+}
+

diff  --git a/llvm/test/CodeGen/X86/divmod128.ll b/llvm/test/CodeGen/X86/divmod128.ll
index c9673edbc09b6..dc5bf7369a050 100644
--- a/llvm/test/CodeGen/X86/divmod128.ll
+++ b/llvm/test/CodeGen/X86/divmod128.ll
@@ -68,7 +68,7 @@ define i64 @umod128(i128 %x) nounwind {
 ; X86-64-LABEL: umod128:
 ; X86-64:       # %bb.0:
 ; X86-64-NEXT:    pushq %rax
-; X86-64-NEXT:    movl $3, %edx
+; X86-64-NEXT:    movl $11, %edx
 ; X86-64-NEXT:    xorl %ecx, %ecx
 ; X86-64-NEXT:    callq __umodti3 at PLT
 ; X86-64-NEXT:    popq %rcx
@@ -79,7 +79,7 @@ define i64 @umod128(i128 %x) nounwind {
 ; WIN64-NEXT:    subq $72, %rsp
 ; WIN64-NEXT:    movq %rdx, {{[0-9]+}}(%rsp)
 ; WIN64-NEXT:    movq %rcx, {{[0-9]+}}(%rsp)
-; WIN64-NEXT:    movq $3, {{[0-9]+}}(%rsp)
+; WIN64-NEXT:    movq $11, {{[0-9]+}}(%rsp)
 ; WIN64-NEXT:    movq $0, {{[0-9]+}}(%rsp)
 ; WIN64-NEXT:    leaq {{[0-9]+}}(%rsp), %rcx
 ; WIN64-NEXT:    leaq {{[0-9]+}}(%rsp), %rdx
@@ -89,7 +89,7 @@ define i64 @umod128(i128 %x) nounwind {
 ; WIN64-NEXT:    retq
 
 
-  %1 = urem i128 %x, 3
+  %1 = urem i128 %x, 11
   %2 = trunc i128 %1 to i64
   ret i64 %2
 }
@@ -663,3 +663,34 @@ entry:
   %rem = udiv i128 %x, 12
   ret i128 %rem
 }
+
+define i128 @urem_i128_3_optsize(i128 %x) nounwind optsize {
+; X86-64-LABEL: urem_i128_3_optsize:
+; X86-64:       # %bb.0: # %entry
+; X86-64-NEXT:    pushq %rax
+; X86-64-NEXT:    movl $3, %edx
+; X86-64-NEXT:    xorl %ecx, %ecx
+; X86-64-NEXT:    callq __umodti3 at PLT
+; X86-64-NEXT:    popq %rcx
+; X86-64-NEXT:    retq
+;
+; WIN64-LABEL: urem_i128_3_optsize:
+; WIN64:       # %bb.0: # %entry
+; WIN64-NEXT:    subq $72, %rsp
+; WIN64-NEXT:    leaq {{[0-9]+}}(%rsp), %rax
+; WIN64-NEXT:    movq %rdx, 8(%rax)
+; WIN64-NEXT:    movq %rcx, (%rax)
+; WIN64-NEXT:    leaq {{[0-9]+}}(%rsp), %rdx
+; WIN64-NEXT:    movq $3, (%rdx)
+; WIN64-NEXT:    movq $0, 8(%rdx)
+; WIN64-NEXT:    movq %rax, %rcx
+; WIN64-NEXT:    callq __umodti3
+; WIN64-NEXT:    movq %xmm0, %rax
+; WIN64-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
+; WIN64-NEXT:    movq %xmm0, %rdx
+; WIN64-NEXT:    addq $72, %rsp
+; WIN64-NEXT:    retq
+entry:
+  %rem = urem i128 %x, 3
+  ret i128 %rem
+}