[PATCH] D132939: [Peephole] rewrite INSERT_SUBREG to SUBREG_TO_REG if upper bits zero

[Allen zhong via Phabricator via llvm-commits]

Allen updated this revision to Diff 457780.
Allen retitled this revision from "[TwoAddressInstruction] rewrite INSERT_SUBREG to SUBREG_TO_REG if upper bits zero" to "[Peephole] rewrite INSERT_SUBREG to SUBREG_TO_REG if upper bits zero".
Allen edited the summary of this revision.
Allen added a comment.

move this transform in target-specific code to ensure the safety


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D132939/new/

https://reviews.llvm.org/D132939

Files:
  llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
  llvm/test/CodeGen/AArch64/peephole-insert-subreg.mir

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