[PATCH] D133198: [SCCP] convert signed div/rem to unsigned for non-negative operands

[Sanjay Patel via Phabricator via llvm-commits]

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This extends the transform added with D81756 <https://reviews.llvm.org/D81756> to handle div/rem opcodes. For example:
https://alive2.llvm.org/ce/z/cX6za6

This replicates part of what CVP already does, but the motivating example from issue #57472 <https://github.com/llvm/llvm-project/issues/57472>, demonstrates a phase ordering problem - we convert branches to select before CVP runs and miss the transform.

I didn't find an explanation for skipping a constant operand in the existing zext code (ie, sext i8 42 -> zext i8 42 is valid, but we skip it). So that clause is not included for this transform, but there is a test diff for that pattern in case it should be bypassed.

I'd split this into a refactoring NFC patch that adds the helper function, then add the code for sdiv/srem cases if approved. I can also add ashr->lshr as a follow-up.


https://reviews.llvm.org/D133198

Files:
  llvm/lib/Transforms/Scalar/SCCP.cpp
  llvm/test/Transforms/PhaseOrdering/srem.ll
  llvm/test/Transforms/SCCP/binaryops-range-special-cases.ll
  llvm/test/Transforms/SCCP/divrem.ll

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