[llvm] bb0e6b7 - [InstCombine] Precommit tests for umul_with_overflow. nfc
Chenbing Zheng via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 1 20:18:44 PDT 2022
Author: Chenbing Zheng
Date: 2022-09-02T11:18:17+08:00
New Revision: bb0e6b772144b3290eddba25e0f397f7d18673ff
URL: https://github.com/llvm/llvm-project/commit/bb0e6b772144b3290eddba25e0f397f7d18673ff
DIFF: https://github.com/llvm/llvm-project/commit/bb0e6b772144b3290eddba25e0f397f7d18673ff.diff
LOG: [InstCombine] Precommit tests for umul_with_overflow. nfc
Added:
Modified:
llvm/test/Transforms/InstCombine/with_overflow.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/with_overflow.ll b/llvm/test/Transforms/InstCombine/with_overflow.ll
index fc8944e90f8c..98ed00f50707 100644
--- a/llvm/test/Transforms/InstCombine/with_overflow.ll
+++ b/llvm/test/Transforms/InstCombine/with_overflow.ll
@@ -875,6 +875,21 @@ define <4 x i1> @smul_not_neg1_vec(<4 x i8> %x) {
ret <4 x i1> %ov
}
+; issue #54053
+
+define i8 @umul_neg1_select(i8 %x) {
+; CHECK-LABEL: @umul_neg1_select(
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i8 [[X:%.*]], 0
+; CHECK-NEXT: [[R:%.*]] = sext i1 [[TMP1]] to i8
+; CHECK-NEXT: ret i8 [[R]]
+;
+ %m = tail call { i8, i1 } @llvm.umul.with.overflow.i8(i8 %x, i8 -1)
+ %m0 = extractvalue { i8, i1 } %m, 0
+ %m1 = extractvalue { i8, i1 } %m, 1
+ %r = select i1 %m1, i8 -1, i8 %m0
+ ret i8 %r
+}
+
; TODO: this could be 'shl' and 'icmp'
define i8 @umul_2(i8 %x, i1* %p) {
@@ -892,17 +907,74 @@ define i8 @umul_2(i8 %x, i1* %p) {
ret i8 %r
}
-; issue #54053
+define i8 @umul_8(i8 %x, i1* %p) {
+; CHECK-LABEL: @umul_8(
+; CHECK-NEXT: [[M:%.*]] = tail call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[X:%.*]], i8 8)
+; CHECK-NEXT: [[R:%.*]] = extractvalue { i8, i1 } [[M]], 0
+; CHECK-NEXT: [[OV:%.*]] = extractvalue { i8, i1 } [[M]], 1
+; CHECK-NEXT: store i1 [[OV]], i1* [[P:%.*]], align 1
+; CHECK-NEXT: ret i8 [[R]]
+;
+ %m = tail call { i8, i1 } @llvm.umul.with.overflow.i8(i8 %x, i8 8)
+ %r = extractvalue { i8, i1 } %m, 0
+ %ov = extractvalue { i8, i1 } %m, 1
+ store i1 %ov, i1* %p
+ ret i8 %r
+}
-define i8 @umul_neg1_select(i8 %x) {
-; CHECK-LABEL: @umul_neg1_select(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i8 [[X:%.*]], 0
-; CHECK-NEXT: [[R:%.*]] = sext i1 [[TMP1]] to i8
+define i8 @umul_64(i8 %x, i1* %p) {
+; CHECK-LABEL: @umul_64(
+; CHECK-NEXT: [[M:%.*]] = tail call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[X:%.*]], i8 64)
+; CHECK-NEXT: [[R:%.*]] = extractvalue { i8, i1 } [[M]], 0
+; CHECK-NEXT: [[OV:%.*]] = extractvalue { i8, i1 } [[M]], 1
+; CHECK-NEXT: store i1 [[OV]], i1* [[P:%.*]], align 1
; CHECK-NEXT: ret i8 [[R]]
;
- %m = tail call { i8, i1 } @llvm.umul.with.overflow.i8(i8 %x, i8 -1)
- %m0 = extractvalue { i8, i1 } %m, 0
- %m1 = extractvalue { i8, i1 } %m, 1
- %r = select i1 %m1, i8 -1, i8 %m0
+ %m = tail call { i8, i1 } @llvm.umul.with.overflow.i8(i8 %x, i8 64)
+ %r = extractvalue { i8, i1 } %m, 0
+ %ov = extractvalue { i8, i1 } %m, 1
+ store i1 %ov, i1* %p
+ ret i8 %r
+}
+
+define i8 @umul_256(i8 %x, i1* %p) {
+; CHECK-LABEL: @umul_256(
+; CHECK-NEXT: store i1 false, i1* [[P:%.*]], align 1
+; CHECK-NEXT: ret i8 0
+;
+ %m = tail call { i8, i1 } @llvm.umul.with.overflow.i8(i8 %x, i8 256)
+ %r = extractvalue { i8, i1 } %m, 0
+ %ov = extractvalue { i8, i1 } %m, 1
+ store i1 %ov, i1* %p
+ ret i8 %r
+}
+
+define i8 @umul_3(i8 %x, i1* %p) {
+; CHECK-LABEL: @umul_3(
+; CHECK-NEXT: [[M:%.*]] = tail call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[X:%.*]], i8 3)
+; CHECK-NEXT: [[R:%.*]] = extractvalue { i8, i1 } [[M]], 0
+; CHECK-NEXT: [[OV:%.*]] = extractvalue { i8, i1 } [[M]], 1
+; CHECK-NEXT: store i1 [[OV]], i1* [[P:%.*]], align 1
+; CHECK-NEXT: ret i8 [[R]]
+;
+ %m = tail call { i8, i1 } @llvm.umul.with.overflow.i8(i8 %x, i8 3)
+ %r = extractvalue { i8, i1 } %m, 0
+ %ov = extractvalue { i8, i1 } %m, 1
+ store i1 %ov, i1* %p
+ ret i8 %r
+}
+
+define i8 @smul_2(i8 %x, i1* %p) {
+; CHECK-LABEL: @smul_2(
+; CHECK-NEXT: [[M:%.*]] = tail call { i8, i1 } @llvm.smul.with.overflow.i8(i8 [[X:%.*]], i8 2)
+; CHECK-NEXT: [[R:%.*]] = extractvalue { i8, i1 } [[M]], 0
+; CHECK-NEXT: [[OV:%.*]] = extractvalue { i8, i1 } [[M]], 1
+; CHECK-NEXT: store i1 [[OV]], i1* [[P:%.*]], align 1
+; CHECK-NEXT: ret i8 [[R]]
+;
+ %m = tail call { i8, i1 } @llvm.smul.with.overflow.i8(i8 %x, i8 2)
+ %r = extractvalue { i8, i1 } %m, 0
+ %ov = extractvalue { i8, i1 } %m, 1
+ store i1 %ov, i1* %p
ret i8 %r
}
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