[PATCH] D131959: [AMDGPU] Fix SDST operand of V_DIV_SCALE to always be VCC

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

> I quickly checked and `check-llvm-codegen-amdgpu` passes if I skip lowering Copies to i1 for VCC/VCC_LO. Should we just do that?

My gut feeling is that that's not safe because VCC/VCC_LO should be treated the same as any other SGPRs. But really I'm out of my depth here and I don't know what the correct solution is.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D131959/new/

https://reviews.llvm.org/D131959