[llvm] 6e0ae7e - [RISCV] Slightly simplify coode in combineVWADD_W_VL_VWSUB_W_VL and combineMUL_VLToVWMUL_VL. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 31 15:05:19 PDT 2022
Author: Craig Topper
Date: 2022-08-31T15:02:03-07:00
New Revision: 6e0ae7e940de2745bb96054b566b0a10782aea04
URL: https://github.com/llvm/llvm-project/commit/6e0ae7e940de2745bb96054b566b0a10782aea04
DIFF: https://github.com/llvm/llvm-project/commit/6e0ae7e940de2745bb96054b566b0a10782aea04.diff
LOG: [RISCV] Slightly simplify coode in combineVWADD_W_VL_VWSUB_W_VL and combineMUL_VLToVWMUL_VL. NFC
Use computeMaxSignificantBits instead of ComputeNumSignBits. Create
APInt as part of call to MaskedValueIsZero instead of creating
a named temporary.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index e306622f9bf81..32e794fbb0770 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -8744,11 +8744,11 @@ static SDValue combineVWADD_W_VL_VWSUB_W_VL(SDNode *N, SelectionDAG &DAG) {
return SDValue();
if (IsSigned) {
- if (DAG.ComputeNumSignBits(Op0) <= (ScalarBits - NarrowSize))
+ if (DAG.ComputeMaxSignificantBits(Op0) > NarrowSize)
return SDValue();
} else {
- APInt Mask = APInt::getBitsSetFrom(ScalarBits, NarrowSize);
- if (!DAG.MaskedValueIsZero(Op0, Mask))
+ if (!DAG.MaskedValueIsZero(Op0,
+ APInt::getBitsSetFrom(ScalarBits, NarrowSize)))
return SDValue();
}
@@ -8826,16 +8826,15 @@ static SDValue combineMUL_VLToVWMUL_VL(SDNode *N, SelectionDAG &DAG,
return SDValue();
// If the LHS is a sign extend, try to use vwmul.
- if (IsSignExt && DAG.ComputeNumSignBits(Op1) > (ScalarBits - NarrowSize)) {
+ if (IsSignExt && DAG.ComputeMaxSignificantBits(Op1) <= NarrowSize) {
// Can use vwmul.
- } else {
- // Otherwise try to use vwmulu or vwmulsu.
- APInt Mask = APInt::getBitsSetFrom(ScalarBits, NarrowSize);
- if (DAG.MaskedValueIsZero(Op1, Mask))
- IsVWMULSU = IsSignExt;
- else
- return SDValue();
- }
+ } else if (DAG.MaskedValueIsZero(
+ Op1, APInt::getBitsSetFrom(ScalarBits, NarrowSize))) {
+ // Scalar is zero extended, if the vector is sign extended we can use
+ // vwmulsu. If the vector is zero extended we can use vwmulu.
+ IsVWMULSU = IsSignExt;
+ } else
+ return SDValue();
Op1 = DAG.getNode(RISCVISD::VMV_V_X_VL, DL, NarrowVT,
DAG.getUNDEF(NarrowVT), Op1, VL);
More information about the llvm-commits
mailing list