[llvm] 30a4264 - [RISCV][CodeGen] add assertion to RISCVTargetStreamer getTargetStreamer()

[Craig Topper via llvm-commits]

Author: Michael Maitland
Date: 2022-08-31T11:15:47-07:00
New Revision: 30a4264f5fb24ee34de5a61cc8ba8d9d879b5af5

URL: https://github.com/llvm/llvm-project/commit/30a4264f5fb24ee34de5a61cc8ba8d9d879b5af5
DIFF: https://github.com/llvm/llvm-project/commit/30a4264f5fb24ee34de5a61cc8ba8d9d879b5af5.diff

LOG: [RISCV][CodeGen] add assertion to RISCVTargetStreamer getTargetStreamer()

X86 and ARM AsmParsers have this same assertion. This assertion provides better reporting when the RISCVTargetStreamer is null and helps to prevent null pointer access.

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D132863

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index 69fb9d2844d39..86c8af874d2da 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -74,6 +74,8 @@ class RISCVAsmParser : public MCTargetAsmParser {
   bool isRV32E() const { return getSTI().hasFeature(RISCV::FeatureRV32E); }
 
   RISCVTargetStreamer &getTargetStreamer() {
+    assert(getParser().getStreamer().getTargetStreamer() &&
+           "do not have a target streamer");
     MCTargetStreamer &TS = *getParser().getStreamer().getTargetStreamer();
     return static_cast<RISCVTargetStreamer &>(TS);
   }