[llvm] 9d22800 - [DAG] visitFreeze - account for operand depth when calling isGuaranteedNotToBeUndefOrPoison (PR57402)

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-08-31T12:20:30+01:00
New Revision: 9d22800275cdbb91cf4df91638887af550f8a60b

URL: https://github.com/llvm/llvm-project/commit/9d22800275cdbb91cf4df91638887af550f8a60b
DIFF: https://github.com/llvm/llvm-project/commit/9d22800275cdbb91cf4df91638887af550f8a60b.diff

LOG: [DAG] visitFreeze - account for operand depth when calling isGuaranteedNotToBeUndefOrPoison (PR57402)

We were calling isGuaranteedNotToBeUndefOrPoison on operands (with Depth = 0), but wasn't accounting for the fact that a later isGuaranteedNotToBeUndefOrPoison assertion will call from the new node (with Depth = 0 as well) - which will then recursively call isGuaranteedNotToBeUndefOrPoison for its operands with Depth = 1

Fixes #57402

Added: 
    llvm/test/CodeGen/X86/pr57402.ll

Modified: 
    llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 032aa56300c47..fd5c17257115a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -13956,7 +13956,8 @@ SDValue DAGCombiner::visitFREEZE(SDNode *N) {
       N0->getNumValues() == 1 && N0->hasOneUse()) {
     SDValue MaybePoisonOperand;
     for (SDValue Op : N0->ops()) {
-      if (DAG.isGuaranteedNotToBeUndefOrPoison(Op, /*PoisonOnly*/ false))
+      if (DAG.isGuaranteedNotToBeUndefOrPoison(Op, /*PoisonOnly*/ false,
+                                               /*Depth*/ 1))
         continue;
       if ((!MaybePoisonOperand && N0->isOnlyUserOf(Op.getNode())) ||
           MaybePoisonOperand == Op) {

diff  --git a/llvm/test/CodeGen/X86/pr57402.ll b/llvm/test/CodeGen/X86/pr57402.ll
new file mode 100644
index 0000000000000..72f0aa37214cc
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr57402.ll
@@ -0,0 +1,60 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+
+define void @PR57402() {
+; CHECK-LABEL: PR57402:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    notl %eax
+; CHECK-NEXT:    andl $-2, %eax
+; CHECK-NEXT:    leal (%rax,%rax,2), %ecx
+; CHECK-NEXT:    orl $1, %ecx
+; CHECK-NEXT:    movswq %cx, %rsi
+; CHECK-NEXT:    xorl %edi, %edi
+; CHECK-NEXT:    movq $-1, %rax
+; CHECK-NEXT:    xorl %edx, %edx
+; CHECK-NEXT:    divq %rsi
+; CHECK-NEXT:    testb %dil, %dil
+; CHECK-NEXT:    jne .LBB0_4
+; CHECK-NEXT:  # %bb.1: # %entry
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    testb %al, %al
+; CHECK-NEXT:    jne .LBB0_4
+; CHECK-NEXT:  # %bb.2: # %entry
+; CHECK-NEXT:    movswl %dx, %eax
+; CHECK-NEXT:    movswl %cx, %ecx
+; CHECK-NEXT:    andl %eax, %ecx
+; CHECK-NEXT:    imull %ecx, %eax
+; CHECK-NEXT:    testq %rax, %rax
+; CHECK-NEXT:    jne .LBB0_3
+; CHECK-NEXT:  .LBB0_4: # %if.end
+; CHECK-NEXT:    retq
+; CHECK-NEXT:  .LBB0_3: # %if.then
+entry:
+  %.fr = freeze i64 undef
+  %0 = trunc i64 %.fr to i16
+  %1 = and i16 %0, -2
+  %2 = xor i16 %1, -2
+  %3 = mul i16 %2, 3
+  %conv = or i16 %3, 1
+  %conv2 = sext i16 %conv to i64
+  %rem = urem i64 -1, %conv2
+  %conv3 = trunc i64 %rem to i32
+  %sext = shl i32 %conv3, 16
+  %conv4 = ashr exact i32 %sext, 16
+  %conv5 = sext i16 %conv to i32
+  %and = and i32 %conv4, %conv5
+  %and.fr = freeze i32 %and
+  %conv6 = sext i32 %and.fr to i64
+  %mul7 = mul i64 %.fr, %conv6
+  %4 = and i64 %mul7, 4294967295
+  %tobool1216 = icmp ne i64 %4, 0
+  %tobool12 = and i1 undef, %tobool1216
+  %or.cond = and i1 undef, %tobool12
+  br i1 %or.cond, label %if.then, label %if.end
+
+if.then:                                          ; preds = %entry
+  unreachable
+
+if.end:                                           ; preds = %entry
+  ret void
+}