[PATCH] D132939: [TwoAddressInstruction] rewrite INSERT_SUBREG to SUBREG_TO_REG if upper bits zero

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 30 07:27:06 PDT 2022


foad requested changes to this revision.
foad added a comment.
This revision now requires changes to proceed.

Nack. Whatever you are trying to do, I think this is the wrong way to do it.

> rewrite INSERT_SUBREG to SUBREG_TO_REG if upper bits zero

Where do you actually check that the upper bits are zero?



================
Comment at: llvm/lib/CodeGen/TwoAddressInstructionPass.cpp:1829-1831
+        // When you use the 32-bit form of an instruction, the upper 32 bits of
+        // the source registers are ignored and the upper 32 bits of the
+        // destination register are set to zero.
----------------
This might be true for //some// instructions on //some// targets, but it is not true for Machine IR in general.


================
Comment at: llvm/lib/CodeGen/TwoAddressInstructionPass.cpp:1840-1841
+            (SrcMI->getOpcode() <= TargetOpcode::GENERIC_OP_END) ||
+            !TRI->isTypeLegalForClass(*RC, MVT::i64) ||
+            TRI->isTypeLegalForClass(*RC, MVT::f64)) {
+          // From %reg = INSERT_SUBREG %reg, %subreg, subidx
----------------
I don't think it's acceptable to restrict this to specific types.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D132939/new/

https://reviews.llvm.org/D132939



More information about the llvm-commits mailing list