[PATCH] D132878: [AMDGPU][GFX11] Fix dst register class for V_CVT_U32_U16

[Joe Nash via Phabricator via llvm-commits]

Joe_Nash added a comment.

This instruction may not even be being used. Did we forget to implement an ISel pattern?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D132878/new/

https://reviews.llvm.org/D132878