[llvm] ac4c46d - [InstCombine] add tests for increment-of-ashr; NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2022-08-29T08:48:22-04:00
New Revision: ac4c46d24bb9b12f289b8cc2c2be24800e4e71dd

URL: https://github.com/llvm/llvm-project/commit/ac4c46d24bb9b12f289b8cc2c2be24800e4e71dd
DIFF: https://github.com/llvm/llvm-project/commit/ac4c46d24bb9b12f289b8cc2c2be24800e4e71dd.diff

LOG: [InstCombine] add tests for increment-of-ashr; NFC

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/add.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/add.ll b/llvm/test/Transforms/InstCombine/add.ll
index 81e2dadc143a..bc27117b368b 100644
--- a/llvm/test/Transforms/InstCombine/add.ll
+++ b/llvm/test/Transforms/InstCombine/add.ll
@@ -1897,3 +1897,60 @@ define i8 @not_mul_use2(i8 %x) {
   %plusx = add i8 %not, %x
   ret i8 %plusx
 }
+
+define i8 @full_ashr_inc(i8 %x) {
+; CHECK-LABEL: @full_ashr_inc(
+; CHECK-NEXT:    [[A:%.*]] = ashr i8 [[X:%.*]], 7
+; CHECK-NEXT:    [[R:%.*]] = add nsw i8 [[A]], 1
+; CHECK-NEXT:    ret i8 [[R]]
+;
+  %a = ashr i8 %x, 7
+  %r = add i8 %a, 1
+  ret i8 %r
+}
+
+define <2 x i6> @full_ashr_inc_vec(<2 x i6> %x) {
+; CHECK-LABEL: @full_ashr_inc_vec(
+; CHECK-NEXT:    [[A:%.*]] = ashr <2 x i6> [[X:%.*]], <i6 5, i6 poison>
+; CHECK-NEXT:    [[R:%.*]] = add <2 x i6> [[A]], <i6 1, i6 1>
+; CHECK-NEXT:    ret <2 x i6> [[R]]
+;
+  %a = ashr <2 x i6> %x, <i6 5, i6 poison>
+  %r = add <2 x i6> %a, <i6 1, i6 1>
+  ret <2 x i6> %r
+}
+
+define i8 @full_ashr_inc_use(i8 %x) {
+; CHECK-LABEL: @full_ashr_inc_use(
+; CHECK-NEXT:    [[A:%.*]] = ashr i8 [[X:%.*]], 7
+; CHECK-NEXT:    call void @use(i8 [[A]])
+; CHECK-NEXT:    [[R:%.*]] = add nsw i8 [[A]], 1
+; CHECK-NEXT:    ret i8 [[R]]
+;
+  %a = ashr i8 %x, 7
+  call void @use(i8 %a)
+  %r = add i8 %a, 1
+  ret i8 %r
+}
+
+define i8 @not_full_ashr_inc(i8 %x) {
+; CHECK-LABEL: @not_full_ashr_inc(
+; CHECK-NEXT:    [[A:%.*]] = ashr i8 [[X:%.*]], 6
+; CHECK-NEXT:    [[R:%.*]] = add nsw i8 [[A]], 1
+; CHECK-NEXT:    ret i8 [[R]]
+;
+  %a = ashr i8 %x, 6
+  %r = add i8 %a, 1
+  ret i8 %r
+}
+
+define i8 @full_ashr_not_inc(i8 %x) {
+; CHECK-LABEL: @full_ashr_not_inc(
+; CHECK-NEXT:    [[A:%.*]] = ashr i8 [[X:%.*]], 7
+; CHECK-NEXT:    [[R:%.*]] = add nsw i8 [[A]], 2
+; CHECK-NEXT:    ret i8 [[R]]
+;
+  %a = ashr i8 %x, 7
+  %r = add i8 %a, 2
+  ret i8 %r
+}