[PATCH] D131229: [LoongArch] Add codegen support for atomicrmw xchg operation on LA32

Gong LingQin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Aug 28 20:37:39 PDT 2022


gonglingqin added inline comments.


================
Comment at: llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp:111
+  //   beq scratch, zero, loop
+  BuildMI(LoopMBB, DL, TII->get(LoongArch::DBAR)).addImm(0);
+  BuildMI(LoopMBB, DL, TII->get(LoongArch::LL_W), DestReg)
----------------
gonglingqin wrote:
> xen0n wrote:
> > In GCC they apparently used `dbar 0x700` for open-coded atomic CAS templates, that seemed to result from a hardware erratum. If in a future hardware iteration this `dbar` is going to become unnecessary, coding `dbar 0x700` here might be a good idea.
> > 
> > You may confirm with the CPU designers and the GCC team for this.
> Thanks, this issue is being confirmed.
Thank you for your reminder. After confirmation, Dbar 0x700 will be used in the subsequent CAS operation, and Dbar 0 is sufficient in the current atomic binary operation.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D131229/new/

https://reviews.llvm.org/D131229



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