[PATCH] D132722: [RISCV][NFC] Refactor fadd test to match the code.

[Jianjian Guan via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG1a1c59f99586: [RISCV][NFC] Refactor fadd test to match the code. (authored by jacquesguan).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D132722/new/

https://reviews.llvm.org/D132722

Files:
  llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll


Index: llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll
+++ llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll
@@ -256,6 +256,21 @@
   ret float %rdx
 }
 
+define float @reduce_fadd2(float %x, <4 x float> %v) {
+; CHECK-LABEL: reduce_fadd2:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vsetivli zero, 1, e32, m1, ta, mu
+; CHECK-NEXT:    vfmv.s.f v9, fa0
+; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
+; CHECK-NEXT:    vfredusum.vs v8, v8, v9
+; CHECK-NEXT:    vfmv.f.s fa0, v8
+; CHECK-NEXT:    ret
+entry:
+  %rdx = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.0, <4 x float> %v)
+  %res = fadd fast float %rdx, %x
+  ret float %res
+}
+
 define float @reduce_fmax(float %x, <4 x float> %v) {
 ; CHECK-LABEL: reduce_fmax:
 ; CHECK:       # %bb.0: # %entry


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