[llvm] a42e21d - [RISCV] Refactor for costs of integer min/max
via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 28 19:44:28 PDT 2022
Author: liqinweng
Date: 2022-08-29T10:13:50+08:00
New Revision: a42e21deb8918b66fb03a9ba6692b0150dc54c94
URL: https://github.com/llvm/llvm-project/commit/a42e21deb8918b66fb03a9ba6692b0150dc54c94
DIFF: https://github.com/llvm/llvm-project/commit/a42e21deb8918b66fb03a9ba6692b0150dc54c94.diff
LOG: [RISCV] Refactor for costs of integer min/max
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D132724
Added:
Modified:
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index a3901829bb46..debf8252b10a 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -264,435 +264,311 @@ InstructionCost RISCVTTIImpl::getGatherScatterOpCost(
// instruction counts with the following adjustments made:
// * One vsetvli is considered free.
static const CostTblEntry VectorIntrinsicCostTable[]{
- {Intrinsic::floor, MVT::v2f32, 15},
- {Intrinsic::floor, MVT::v4f32, 15},
- {Intrinsic::floor, MVT::v8f32, 15},
- {Intrinsic::floor, MVT::v16f32, 15},
- {Intrinsic::floor, MVT::nxv2f32, 15},
- {Intrinsic::floor, MVT::nxv4f32, 15},
- {Intrinsic::floor, MVT::nxv8f32, 15},
- {Intrinsic::floor, MVT::nxv16f32, 15},
- {Intrinsic::floor, MVT::v2f64, 15},
- {Intrinsic::floor, MVT::v4f64, 15},
- {Intrinsic::floor, MVT::v8f64, 15},
- {Intrinsic::floor, MVT::v16f64, 15},
- {Intrinsic::floor, MVT::nxv1f64, 15},
- {Intrinsic::floor, MVT::nxv2f64, 15},
- {Intrinsic::floor, MVT::nxv4f64, 15},
- {Intrinsic::floor, MVT::nxv8f64, 15},
- {Intrinsic::ceil, MVT::v2f32, 15},
- {Intrinsic::ceil, MVT::v4f32, 15},
- {Intrinsic::ceil, MVT::v8f32, 15},
- {Intrinsic::ceil, MVT::v16f32, 15},
- {Intrinsic::ceil, MVT::nxv2f32, 15},
- {Intrinsic::ceil, MVT::nxv4f32, 15},
- {Intrinsic::ceil, MVT::nxv8f32, 15},
- {Intrinsic::ceil, MVT::nxv16f32, 15},
- {Intrinsic::ceil, MVT::v2f64, 15},
- {Intrinsic::ceil, MVT::v4f64, 15},
- {Intrinsic::ceil, MVT::v8f64, 15},
- {Intrinsic::ceil, MVT::v16f64, 15},
- {Intrinsic::ceil, MVT::nxv1f64, 15},
- {Intrinsic::ceil, MVT::nxv2f64, 15},
- {Intrinsic::ceil, MVT::nxv4f64, 15},
- {Intrinsic::ceil, MVT::nxv8f64, 15},
- {Intrinsic::trunc, MVT::v2f32, 7},
- {Intrinsic::trunc, MVT::v4f32, 7},
- {Intrinsic::trunc, MVT::v8f32, 7},
- {Intrinsic::trunc, MVT::v16f32, 7},
- {Intrinsic::trunc, MVT::nxv2f32, 7},
- {Intrinsic::trunc, MVT::nxv4f32, 7},
- {Intrinsic::trunc, MVT::nxv8f32, 7},
- {Intrinsic::trunc, MVT::nxv16f32, 7},
- {Intrinsic::trunc, MVT::v2f64, 7},
- {Intrinsic::trunc, MVT::v4f64, 7},
- {Intrinsic::trunc, MVT::v8f64, 7},
- {Intrinsic::trunc, MVT::v16f64, 7},
- {Intrinsic::trunc, MVT::nxv1f64, 7},
- {Intrinsic::trunc, MVT::nxv2f64, 7},
- {Intrinsic::trunc, MVT::nxv4f64, 7},
- {Intrinsic::trunc, MVT::nxv8f64, 7},
- {Intrinsic::round, MVT::v2f32, 10},
- {Intrinsic::round, MVT::v4f32, 10},
- {Intrinsic::round, MVT::v8f32, 10},
- {Intrinsic::round, MVT::v16f32, 10},
- {Intrinsic::round, MVT::nxv2f32, 10},
- {Intrinsic::round, MVT::nxv4f32, 10},
- {Intrinsic::round, MVT::nxv8f32, 10},
- {Intrinsic::round, MVT::nxv16f32, 10},
- {Intrinsic::round, MVT::v2f64, 10},
- {Intrinsic::round, MVT::v4f64, 10},
- {Intrinsic::round, MVT::v8f64, 10},
- {Intrinsic::round, MVT::v16f64, 10},
- {Intrinsic::round, MVT::nxv1f64, 10},
- {Intrinsic::round, MVT::nxv2f64, 10},
- {Intrinsic::round, MVT::nxv4f64, 10},
- {Intrinsic::round, MVT::nxv8f64, 10},
- {Intrinsic::fabs, MVT::v2f32, 1},
- {Intrinsic::fabs, MVT::v4f32, 1},
- {Intrinsic::fabs, MVT::v8f32, 1},
- {Intrinsic::fabs, MVT::v16f32, 1},
- {Intrinsic::fabs, MVT::nxv2f32, 1},
- {Intrinsic::fabs, MVT::nxv4f32, 1},
- {Intrinsic::fabs, MVT::nxv8f32, 1},
- {Intrinsic::fabs, MVT::nxv16f32, 1},
- {Intrinsic::fabs, MVT::v2f64, 1},
- {Intrinsic::fabs, MVT::v4f64, 1},
- {Intrinsic::fabs, MVT::v8f64, 1},
- {Intrinsic::fabs, MVT::v16f64, 1},
- {Intrinsic::fabs, MVT::nxv1f64, 1},
- {Intrinsic::fabs, MVT::nxv2f64, 1},
- {Intrinsic::fabs, MVT::nxv4f64, 1},
- {Intrinsic::fabs, MVT::nxv8f64, 1},
- {Intrinsic::sqrt, MVT::v2f32, 1},
- {Intrinsic::sqrt, MVT::v4f32, 1},
- {Intrinsic::sqrt, MVT::v8f32, 1},
- {Intrinsic::sqrt, MVT::v16f32, 1},
- {Intrinsic::sqrt, MVT::nxv2f32, 1},
- {Intrinsic::sqrt, MVT::nxv4f32, 1},
- {Intrinsic::sqrt, MVT::nxv8f32, 1},
- {Intrinsic::sqrt, MVT::nxv16f32, 1},
- {Intrinsic::sqrt, MVT::v2f64, 1},
- {Intrinsic::sqrt, MVT::v4f64, 1},
- {Intrinsic::sqrt, MVT::v8f64, 1},
- {Intrinsic::sqrt, MVT::v16f64, 1},
- {Intrinsic::sqrt, MVT::nxv1f64, 1},
- {Intrinsic::sqrt, MVT::nxv2f64, 1},
- {Intrinsic::sqrt, MVT::nxv4f64, 1},
- {Intrinsic::sqrt, MVT::nxv8f64, 1},
- {Intrinsic::bswap, MVT::v2i16, 3},
- {Intrinsic::bswap, MVT::v4i16, 3},
- {Intrinsic::bswap, MVT::v8i16, 3},
- {Intrinsic::bswap, MVT::v16i16, 3},
- {Intrinsic::bswap, MVT::nxv2i16, 3},
- {Intrinsic::bswap, MVT::nxv4i16, 3},
- {Intrinsic::bswap, MVT::nxv8i16, 3},
- {Intrinsic::bswap, MVT::nxv16i16, 3},
- {Intrinsic::bswap, MVT::v2i32, 12},
- {Intrinsic::bswap, MVT::v4i32, 12},
- {Intrinsic::bswap, MVT::v8i32, 12},
- {Intrinsic::bswap, MVT::v16i32, 12},
- {Intrinsic::bswap, MVT::nxv2i32, 12},
- {Intrinsic::bswap, MVT::nxv4i32, 12},
- {Intrinsic::bswap, MVT::nxv8i32, 12},
- {Intrinsic::bswap, MVT::nxv16i32, 12},
- {Intrinsic::bswap, MVT::v2i64, 31},
- {Intrinsic::bswap, MVT::v4i64, 31},
- {Intrinsic::bswap, MVT::v8i64, 31},
- {Intrinsic::bswap, MVT::v16i64, 31},
- {Intrinsic::bswap, MVT::nxv2i64, 31},
- {Intrinsic::bswap, MVT::nxv4i64, 31},
- {Intrinsic::bswap, MVT::nxv8i64, 31},
- {Intrinsic::bitreverse, MVT::v2i8, 17},
- {Intrinsic::bitreverse, MVT::v4i8, 17},
- {Intrinsic::bitreverse, MVT::v8i8, 17},
- {Intrinsic::bitreverse, MVT::v16i8, 17},
- {Intrinsic::bitreverse, MVT::nxv2i8, 17},
- {Intrinsic::bitreverse, MVT::nxv4i8, 17},
- {Intrinsic::bitreverse, MVT::nxv8i8, 17},
- {Intrinsic::bitreverse, MVT::nxv16i8, 17},
- {Intrinsic::bitreverse, MVT::v2i16, 24},
- {Intrinsic::bitreverse, MVT::v4i16, 24},
- {Intrinsic::bitreverse, MVT::v8i16, 24},
- {Intrinsic::bitreverse, MVT::v16i16, 24},
- {Intrinsic::bitreverse, MVT::nxv2i16, 24},
- {Intrinsic::bitreverse, MVT::nxv4i16, 24},
- {Intrinsic::bitreverse, MVT::nxv8i16, 24},
- {Intrinsic::bitreverse, MVT::nxv16i16, 24},
- {Intrinsic::bitreverse, MVT::v2i32, 33},
- {Intrinsic::bitreverse, MVT::v4i32, 33},
- {Intrinsic::bitreverse, MVT::v8i32, 33},
- {Intrinsic::bitreverse, MVT::v16i32, 33},
- {Intrinsic::bitreverse, MVT::nxv2i32, 33},
- {Intrinsic::bitreverse, MVT::nxv4i32, 33},
- {Intrinsic::bitreverse, MVT::nxv8i32, 33},
- {Intrinsic::bitreverse, MVT::nxv16i32, 33},
- {Intrinsic::bitreverse, MVT::v2i64, 52},
- {Intrinsic::bitreverse, MVT::v4i64, 52},
- {Intrinsic::bitreverse, MVT::v8i64, 52},
- {Intrinsic::bitreverse, MVT::v16i64, 52},
- {Intrinsic::bitreverse, MVT::nxv2i64, 52},
- {Intrinsic::bitreverse, MVT::nxv4i64, 52},
- {Intrinsic::bitreverse, MVT::nxv8i64, 52},
- {Intrinsic::ctpop, MVT::v2i8, 12},
- {Intrinsic::ctpop, MVT::v4i8, 12},
- {Intrinsic::ctpop, MVT::v8i8, 12},
- {Intrinsic::ctpop, MVT::v16i8, 12},
- {Intrinsic::ctpop, MVT::nxv2i8, 12},
- {Intrinsic::ctpop, MVT::nxv4i8, 12},
- {Intrinsic::ctpop, MVT::nxv8i8, 12},
- {Intrinsic::ctpop, MVT::nxv16i8, 12},
- {Intrinsic::ctpop, MVT::v2i16, 19},
- {Intrinsic::ctpop, MVT::v4i16, 19},
- {Intrinsic::ctpop, MVT::v8i16, 19},
- {Intrinsic::ctpop, MVT::v16i16, 19},
- {Intrinsic::ctpop, MVT::nxv2i16, 19},
- {Intrinsic::ctpop, MVT::nxv4i16, 19},
- {Intrinsic::ctpop, MVT::nxv8i16, 19},
- {Intrinsic::ctpop, MVT::nxv16i16, 19},
- {Intrinsic::ctpop, MVT::v2i32, 20},
- {Intrinsic::ctpop, MVT::v4i32, 20},
- {Intrinsic::ctpop, MVT::v8i32, 20},
- {Intrinsic::ctpop, MVT::v16i32, 20},
- {Intrinsic::ctpop, MVT::nxv2i32, 20},
- {Intrinsic::ctpop, MVT::nxv4i32, 20},
- {Intrinsic::ctpop, MVT::nxv8i32, 20},
- {Intrinsic::ctpop, MVT::nxv16i32, 20},
- {Intrinsic::ctpop, MVT::v2i64, 21},
- {Intrinsic::ctpop, MVT::v4i64, 21},
- {Intrinsic::ctpop, MVT::v8i64, 21},
- {Intrinsic::ctpop, MVT::v16i64, 21},
- {Intrinsic::ctpop, MVT::nxv2i64, 21},
- {Intrinsic::ctpop, MVT::nxv4i64, 21},
- {Intrinsic::ctpop, MVT::nxv8i64, 21},
- {Intrinsic::smax, MVT::v2i8, 1},
- {Intrinsic::smax, MVT::v4i8, 1},
- {Intrinsic::smax, MVT::v8i8, 1},
- {Intrinsic::smax, MVT::v16i8, 1},
- {Intrinsic::smax, MVT::nxv2i8, 1},
- {Intrinsic::smax, MVT::nxv4i8, 1},
- {Intrinsic::smax, MVT::nxv8i8, 1},
- {Intrinsic::smax, MVT::nxv16i8, 1},
- {Intrinsic::smax, MVT::v2i16, 1},
- {Intrinsic::smax, MVT::v4i16, 1},
- {Intrinsic::smax, MVT::v8i16, 1},
- {Intrinsic::smax, MVT::v16i16, 1},
- {Intrinsic::smax, MVT::nxv2i16, 1},
- {Intrinsic::smax, MVT::nxv4i16, 1},
- {Intrinsic::smax, MVT::nxv8i16, 1},
- {Intrinsic::smax, MVT::nxv16i16, 1},
- {Intrinsic::smax, MVT::v2i32, 1},
- {Intrinsic::smax, MVT::v4i32, 1},
- {Intrinsic::smax, MVT::v8i32, 1},
- {Intrinsic::smax, MVT::v16i32, 1},
- {Intrinsic::smax, MVT::nxv2i32, 1},
- {Intrinsic::smax, MVT::nxv4i32, 1},
- {Intrinsic::smax, MVT::nxv8i32, 1},
- {Intrinsic::smax, MVT::nxv16i32, 1},
- {Intrinsic::smax, MVT::v2i64, 1},
- {Intrinsic::smax, MVT::v4i64, 1},
- {Intrinsic::smax, MVT::v8i64, 1},
- {Intrinsic::smax, MVT::v16i64, 1},
- {Intrinsic::smax, MVT::nxv2i64, 1},
- {Intrinsic::smax, MVT::nxv4i64, 1},
- {Intrinsic::smax, MVT::nxv8i64, 1},
- {Intrinsic::smin, MVT::v2i8, 1},
- {Intrinsic::smin, MVT::v4i8, 1},
- {Intrinsic::smin, MVT::v8i8, 1},
- {Intrinsic::smin, MVT::v16i8, 1},
- {Intrinsic::smin, MVT::nxv2i8, 1},
- {Intrinsic::smin, MVT::nxv4i8, 1},
- {Intrinsic::smin, MVT::nxv8i8, 1},
- {Intrinsic::smin, MVT::nxv16i8, 1},
- {Intrinsic::smin, MVT::v2i16, 1},
- {Intrinsic::smin, MVT::v4i16, 1},
- {Intrinsic::smin, MVT::v8i16, 1},
- {Intrinsic::smin, MVT::v16i16, 1},
- {Intrinsic::smin, MVT::nxv2i16, 1},
- {Intrinsic::smin, MVT::nxv4i16, 1},
- {Intrinsic::smin, MVT::nxv8i16, 1},
- {Intrinsic::smin, MVT::nxv16i16, 1},
- {Intrinsic::smin, MVT::v2i32, 1},
- {Intrinsic::smin, MVT::v4i32, 1},
- {Intrinsic::smin, MVT::v8i32, 1},
- {Intrinsic::smin, MVT::v16i32, 1},
- {Intrinsic::smin, MVT::nxv2i32, 1},
- {Intrinsic::smin, MVT::nxv4i32, 1},
- {Intrinsic::smin, MVT::nxv8i32, 1},
- {Intrinsic::smin, MVT::nxv16i32, 1},
- {Intrinsic::smin, MVT::v2i64, 1},
- {Intrinsic::smin, MVT::v4i64, 1},
- {Intrinsic::smin, MVT::v8i64, 1},
- {Intrinsic::smin, MVT::v16i64, 1},
- {Intrinsic::smin, MVT::nxv2i64, 1},
- {Intrinsic::smin, MVT::nxv4i64, 1},
- {Intrinsic::smin, MVT::nxv8i64, 1},
- {Intrinsic::umax, MVT::v2i8, 1},
- {Intrinsic::umax, MVT::v4i8, 1},
- {Intrinsic::umax, MVT::v8i8, 1},
- {Intrinsic::umax, MVT::v16i8, 1},
- {Intrinsic::umax, MVT::nxv2i8, 1},
- {Intrinsic::umax, MVT::nxv4i8, 1},
- {Intrinsic::umax, MVT::nxv8i8, 1},
- {Intrinsic::umax, MVT::nxv16i8, 1},
- {Intrinsic::umax, MVT::v2i16, 1},
- {Intrinsic::umax, MVT::v4i16, 1},
- {Intrinsic::umax, MVT::v8i16, 1},
- {Intrinsic::umax, MVT::v16i16, 1},
- {Intrinsic::umax, MVT::nxv2i16, 1},
- {Intrinsic::umax, MVT::nxv4i16, 1},
- {Intrinsic::umax, MVT::nxv8i16, 1},
- {Intrinsic::umax, MVT::nxv16i16, 1},
- {Intrinsic::umax, MVT::v2i32, 1},
- {Intrinsic::umax, MVT::v4i32, 1},
- {Intrinsic::umax, MVT::v8i32, 1},
- {Intrinsic::umax, MVT::v16i32, 1},
- {Intrinsic::umax, MVT::nxv2i32, 1},
- {Intrinsic::umax, MVT::nxv4i32, 1},
- {Intrinsic::umax, MVT::nxv8i32, 1},
- {Intrinsic::umax, MVT::nxv16i32, 1},
- {Intrinsic::umax, MVT::v2i64, 1},
- {Intrinsic::umax, MVT::v4i64, 1},
- {Intrinsic::umax, MVT::v8i64, 1},
- {Intrinsic::umax, MVT::v16i64, 1},
- {Intrinsic::umax, MVT::nxv2i64, 1},
- {Intrinsic::umax, MVT::nxv4i64, 1},
- {Intrinsic::umax, MVT::nxv8i64, 1},
- {Intrinsic::umin, MVT::v2i8, 1},
- {Intrinsic::umin, MVT::v4i8, 1},
- {Intrinsic::umin, MVT::v8i8, 1},
- {Intrinsic::umin, MVT::v16i8, 1},
- {Intrinsic::umin, MVT::nxv2i8, 1},
- {Intrinsic::umin, MVT::nxv4i8, 1},
- {Intrinsic::umin, MVT::nxv8i8, 1},
- {Intrinsic::umin, MVT::nxv16i8, 1},
- {Intrinsic::umin, MVT::v2i16, 1},
- {Intrinsic::umin, MVT::v4i16, 1},
- {Intrinsic::umin, MVT::v8i16, 1},
- {Intrinsic::umin, MVT::v16i16, 1},
- {Intrinsic::umin, MVT::nxv2i16, 1},
- {Intrinsic::umin, MVT::nxv4i16, 1},
- {Intrinsic::umin, MVT::nxv8i16, 1},
- {Intrinsic::umin, MVT::nxv16i16, 1},
- {Intrinsic::umin, MVT::v2i32, 1},
- {Intrinsic::umin, MVT::v4i32, 1},
- {Intrinsic::umin, MVT::v8i32, 1},
- {Intrinsic::umin, MVT::v16i32, 1},
- {Intrinsic::umin, MVT::nxv2i32, 1},
- {Intrinsic::umin, MVT::nxv4i32, 1},
- {Intrinsic::umin, MVT::nxv8i32, 1},
- {Intrinsic::umin, MVT::nxv16i32, 1},
- {Intrinsic::umin, MVT::v2i64, 1},
- {Intrinsic::umin, MVT::v4i64, 1},
- {Intrinsic::umin, MVT::v8i64, 1},
- {Intrinsic::umin, MVT::v16i64, 1},
- {Intrinsic::umin, MVT::nxv2i64, 1},
- {Intrinsic::umin, MVT::nxv4i64, 1},
- {Intrinsic::umin, MVT::nxv8i64, 1},
- {Intrinsic::sadd_sat, MVT::v2i8, 1},
- {Intrinsic::sadd_sat, MVT::v4i8, 1},
- {Intrinsic::sadd_sat, MVT::v8i8, 1},
- {Intrinsic::sadd_sat, MVT::v16i8, 1},
- {Intrinsic::sadd_sat, MVT::nxv2i8, 1},
- {Intrinsic::sadd_sat, MVT::nxv4i8, 1},
- {Intrinsic::sadd_sat, MVT::nxv8i8, 1},
- {Intrinsic::sadd_sat, MVT::nxv16i8, 1},
- {Intrinsic::sadd_sat, MVT::v2i16, 1},
- {Intrinsic::sadd_sat, MVT::v4i16, 1},
- {Intrinsic::sadd_sat, MVT::v8i16, 1},
- {Intrinsic::sadd_sat, MVT::v16i16, 1},
- {Intrinsic::sadd_sat, MVT::nxv2i16, 1},
- {Intrinsic::sadd_sat, MVT::nxv4i16, 1},
- {Intrinsic::sadd_sat, MVT::nxv8i16, 1},
- {Intrinsic::sadd_sat, MVT::nxv16i16, 1},
- {Intrinsic::sadd_sat, MVT::v2i32, 1},
- {Intrinsic::sadd_sat, MVT::v4i32, 1},
- {Intrinsic::sadd_sat, MVT::v8i32, 1},
- {Intrinsic::sadd_sat, MVT::v16i32, 1},
- {Intrinsic::sadd_sat, MVT::nxv2i32, 1},
- {Intrinsic::sadd_sat, MVT::nxv4i32, 1},
- {Intrinsic::sadd_sat, MVT::nxv8i32, 1},
- {Intrinsic::sadd_sat, MVT::nxv16i32, 1},
- {Intrinsic::sadd_sat, MVT::v2i64, 1},
- {Intrinsic::sadd_sat, MVT::v4i64, 1},
- {Intrinsic::sadd_sat, MVT::v8i64, 1},
- {Intrinsic::sadd_sat, MVT::v16i64, 1},
- {Intrinsic::sadd_sat, MVT::nxv2i64, 1},
- {Intrinsic::sadd_sat, MVT::nxv4i64, 1},
- {Intrinsic::sadd_sat, MVT::nxv8i64, 1},
- {Intrinsic::uadd_sat, MVT::v2i8, 1},
- {Intrinsic::uadd_sat, MVT::v4i8, 1},
- {Intrinsic::uadd_sat, MVT::v8i8, 1},
- {Intrinsic::uadd_sat, MVT::v16i8, 1},
- {Intrinsic::uadd_sat, MVT::nxv2i8, 1},
- {Intrinsic::uadd_sat, MVT::nxv4i8, 1},
- {Intrinsic::uadd_sat, MVT::nxv8i8, 1},
- {Intrinsic::uadd_sat, MVT::nxv16i8, 1},
- {Intrinsic::uadd_sat, MVT::v2i16, 1},
- {Intrinsic::uadd_sat, MVT::v4i16, 1},
- {Intrinsic::uadd_sat, MVT::v8i16, 1},
- {Intrinsic::uadd_sat, MVT::v16i16, 1},
- {Intrinsic::uadd_sat, MVT::nxv2i16, 1},
- {Intrinsic::uadd_sat, MVT::nxv4i16, 1},
- {Intrinsic::uadd_sat, MVT::nxv8i16, 1},
- {Intrinsic::uadd_sat, MVT::nxv16i16, 1},
- {Intrinsic::uadd_sat, MVT::v2i32, 1},
- {Intrinsic::uadd_sat, MVT::v4i32, 1},
- {Intrinsic::uadd_sat, MVT::v8i32, 1},
- {Intrinsic::uadd_sat, MVT::v16i32, 1},
- {Intrinsic::uadd_sat, MVT::nxv2i32, 1},
- {Intrinsic::uadd_sat, MVT::nxv4i32, 1},
- {Intrinsic::uadd_sat, MVT::nxv8i32, 1},
- {Intrinsic::uadd_sat, MVT::nxv16i32, 1},
- {Intrinsic::uadd_sat, MVT::v2i64, 1},
- {Intrinsic::uadd_sat, MVT::v4i64, 1},
- {Intrinsic::uadd_sat, MVT::v8i64, 1},
- {Intrinsic::uadd_sat, MVT::v16i64, 1},
- {Intrinsic::uadd_sat, MVT::nxv2i64, 1},
- {Intrinsic::uadd_sat, MVT::nxv4i64, 1},
- {Intrinsic::uadd_sat, MVT::nxv8i64, 1},
- {Intrinsic::usub_sat, MVT::v2i8, 1},
- {Intrinsic::usub_sat, MVT::v4i8, 1},
- {Intrinsic::usub_sat, MVT::v8i8, 1},
- {Intrinsic::usub_sat, MVT::v16i8, 1},
- {Intrinsic::usub_sat, MVT::nxv2i8, 1},
- {Intrinsic::usub_sat, MVT::nxv4i8, 1},
- {Intrinsic::usub_sat, MVT::nxv8i8, 1},
- {Intrinsic::usub_sat, MVT::nxv16i8, 1},
- {Intrinsic::usub_sat, MVT::v2i16, 1},
- {Intrinsic::usub_sat, MVT::v4i16, 1},
- {Intrinsic::usub_sat, MVT::v8i16, 1},
- {Intrinsic::usub_sat, MVT::v16i16, 1},
- {Intrinsic::usub_sat, MVT::nxv2i16, 1},
- {Intrinsic::usub_sat, MVT::nxv4i16, 1},
- {Intrinsic::usub_sat, MVT::nxv8i16, 1},
- {Intrinsic::usub_sat, MVT::nxv16i16, 1},
- {Intrinsic::usub_sat, MVT::v2i32, 1},
- {Intrinsic::usub_sat, MVT::v4i32, 1},
- {Intrinsic::usub_sat, MVT::v8i32, 1},
- {Intrinsic::usub_sat, MVT::v16i32, 1},
- {Intrinsic::usub_sat, MVT::nxv2i32, 1},
- {Intrinsic::usub_sat, MVT::nxv4i32, 1},
- {Intrinsic::usub_sat, MVT::nxv8i32, 1},
- {Intrinsic::usub_sat, MVT::nxv16i32, 1},
- {Intrinsic::usub_sat, MVT::v2i64, 1},
- {Intrinsic::usub_sat, MVT::v4i64, 1},
- {Intrinsic::usub_sat, MVT::v8i64, 1},
- {Intrinsic::usub_sat, MVT::v16i64, 1},
- {Intrinsic::usub_sat, MVT::nxv2i64, 1},
- {Intrinsic::usub_sat, MVT::nxv4i64, 1},
- {Intrinsic::usub_sat, MVT::nxv8i64, 1},
- {Intrinsic::ssub_sat, MVT::v2i8, 1},
- {Intrinsic::ssub_sat, MVT::v4i8, 1},
- {Intrinsic::ssub_sat, MVT::v8i8, 1},
- {Intrinsic::ssub_sat, MVT::v16i8, 1},
- {Intrinsic::ssub_sat, MVT::nxv2i8, 1},
- {Intrinsic::ssub_sat, MVT::nxv4i8, 1},
- {Intrinsic::ssub_sat, MVT::nxv8i8, 1},
- {Intrinsic::ssub_sat, MVT::nxv16i8, 1},
- {Intrinsic::ssub_sat, MVT::v2i16, 1},
- {Intrinsic::ssub_sat, MVT::v4i16, 1},
- {Intrinsic::ssub_sat, MVT::v8i16, 1},
- {Intrinsic::ssub_sat, MVT::v16i16, 1},
- {Intrinsic::ssub_sat, MVT::nxv2i16, 1},
- {Intrinsic::ssub_sat, MVT::nxv4i16, 1},
- {Intrinsic::ssub_sat, MVT::nxv8i16, 1},
- {Intrinsic::ssub_sat, MVT::nxv16i16, 1},
- {Intrinsic::ssub_sat, MVT::v2i32, 1},
- {Intrinsic::ssub_sat, MVT::v4i32, 1},
- {Intrinsic::ssub_sat, MVT::v8i32, 1},
- {Intrinsic::ssub_sat, MVT::v16i32, 1},
- {Intrinsic::ssub_sat, MVT::nxv2i32, 1},
- {Intrinsic::ssub_sat, MVT::nxv4i32, 1},
- {Intrinsic::ssub_sat, MVT::nxv8i32, 1},
- {Intrinsic::ssub_sat, MVT::nxv16i32, 1},
- {Intrinsic::ssub_sat, MVT::v2i64, 1},
- {Intrinsic::ssub_sat, MVT::v4i64, 1},
- {Intrinsic::ssub_sat, MVT::v8i64, 1},
- {Intrinsic::ssub_sat, MVT::v16i64, 1},
- {Intrinsic::ssub_sat, MVT::nxv2i64, 1},
- {Intrinsic::ssub_sat, MVT::nxv4i64, 1},
- {Intrinsic::ssub_sat, MVT::nxv8i64, 1},
+ {Intrinsic::floor, MVT::v2f32, 15},
+ {Intrinsic::floor, MVT::v4f32, 15},
+ {Intrinsic::floor, MVT::v8f32, 15},
+ {Intrinsic::floor, MVT::v16f32, 15},
+ {Intrinsic::floor, MVT::nxv2f32, 15},
+ {Intrinsic::floor, MVT::nxv4f32, 15},
+ {Intrinsic::floor, MVT::nxv8f32, 15},
+ {Intrinsic::floor, MVT::nxv16f32, 15},
+ {Intrinsic::floor, MVT::v2f64, 15},
+ {Intrinsic::floor, MVT::v4f64, 15},
+ {Intrinsic::floor, MVT::v8f64, 15},
+ {Intrinsic::floor, MVT::v16f64, 15},
+ {Intrinsic::floor, MVT::nxv1f64, 15},
+ {Intrinsic::floor, MVT::nxv2f64, 15},
+ {Intrinsic::floor, MVT::nxv4f64, 15},
+ {Intrinsic::floor, MVT::nxv8f64, 15},
+ {Intrinsic::ceil, MVT::v2f32, 15},
+ {Intrinsic::ceil, MVT::v4f32, 15},
+ {Intrinsic::ceil, MVT::v8f32, 15},
+ {Intrinsic::ceil, MVT::v16f32, 15},
+ {Intrinsic::ceil, MVT::nxv2f32, 15},
+ {Intrinsic::ceil, MVT::nxv4f32, 15},
+ {Intrinsic::ceil, MVT::nxv8f32, 15},
+ {Intrinsic::ceil, MVT::nxv16f32, 15},
+ {Intrinsic::ceil, MVT::v2f64, 15},
+ {Intrinsic::ceil, MVT::v4f64, 15},
+ {Intrinsic::ceil, MVT::v8f64, 15},
+ {Intrinsic::ceil, MVT::v16f64, 15},
+ {Intrinsic::ceil, MVT::nxv1f64, 15},
+ {Intrinsic::ceil, MVT::nxv2f64, 15},
+ {Intrinsic::ceil, MVT::nxv4f64, 15},
+ {Intrinsic::ceil, MVT::nxv8f64, 15},
+ {Intrinsic::trunc, MVT::v2f32, 7},
+ {Intrinsic::trunc, MVT::v4f32, 7},
+ {Intrinsic::trunc, MVT::v8f32, 7},
+ {Intrinsic::trunc, MVT::v16f32, 7},
+ {Intrinsic::trunc, MVT::nxv2f32, 7},
+ {Intrinsic::trunc, MVT::nxv4f32, 7},
+ {Intrinsic::trunc, MVT::nxv8f32, 7},
+ {Intrinsic::trunc, MVT::nxv16f32, 7},
+ {Intrinsic::trunc, MVT::v2f64, 7},
+ {Intrinsic::trunc, MVT::v4f64, 7},
+ {Intrinsic::trunc, MVT::v8f64, 7},
+ {Intrinsic::trunc, MVT::v16f64, 7},
+ {Intrinsic::trunc, MVT::nxv1f64, 7},
+ {Intrinsic::trunc, MVT::nxv2f64, 7},
+ {Intrinsic::trunc, MVT::nxv4f64, 7},
+ {Intrinsic::trunc, MVT::nxv8f64, 7},
+ {Intrinsic::round, MVT::v2f32, 10},
+ {Intrinsic::round, MVT::v4f32, 10},
+ {Intrinsic::round, MVT::v8f32, 10},
+ {Intrinsic::round, MVT::v16f32, 10},
+ {Intrinsic::round, MVT::nxv2f32, 10},
+ {Intrinsic::round, MVT::nxv4f32, 10},
+ {Intrinsic::round, MVT::nxv8f32, 10},
+ {Intrinsic::round, MVT::nxv16f32, 10},
+ {Intrinsic::round, MVT::v2f64, 10},
+ {Intrinsic::round, MVT::v4f64, 10},
+ {Intrinsic::round, MVT::v8f64, 10},
+ {Intrinsic::round, MVT::v16f64, 10},
+ {Intrinsic::round, MVT::nxv1f64, 10},
+ {Intrinsic::round, MVT::nxv2f64, 10},
+ {Intrinsic::round, MVT::nxv4f64, 10},
+ {Intrinsic::round, MVT::nxv8f64, 10},
+ {Intrinsic::fabs, MVT::v2f32, 1},
+ {Intrinsic::fabs, MVT::v4f32, 1},
+ {Intrinsic::fabs, MVT::v8f32, 1},
+ {Intrinsic::fabs, MVT::v16f32, 1},
+ {Intrinsic::fabs, MVT::nxv2f32, 1},
+ {Intrinsic::fabs, MVT::nxv4f32, 1},
+ {Intrinsic::fabs, MVT::nxv8f32, 1},
+ {Intrinsic::fabs, MVT::nxv16f32, 1},
+ {Intrinsic::fabs, MVT::v2f64, 1},
+ {Intrinsic::fabs, MVT::v4f64, 1},
+ {Intrinsic::fabs, MVT::v8f64, 1},
+ {Intrinsic::fabs, MVT::v16f64, 1},
+ {Intrinsic::fabs, MVT::nxv1f64, 1},
+ {Intrinsic::fabs, MVT::nxv2f64, 1},
+ {Intrinsic::fabs, MVT::nxv4f64, 1},
+ {Intrinsic::fabs, MVT::nxv8f64, 1},
+ {Intrinsic::sqrt, MVT::v2f32, 1},
+ {Intrinsic::sqrt, MVT::v4f32, 1},
+ {Intrinsic::sqrt, MVT::v8f32, 1},
+ {Intrinsic::sqrt, MVT::v16f32, 1},
+ {Intrinsic::sqrt, MVT::nxv2f32, 1},
+ {Intrinsic::sqrt, MVT::nxv4f32, 1},
+ {Intrinsic::sqrt, MVT::nxv8f32, 1},
+ {Intrinsic::sqrt, MVT::nxv16f32, 1},
+ {Intrinsic::sqrt, MVT::v2f64, 1},
+ {Intrinsic::sqrt, MVT::v4f64, 1},
+ {Intrinsic::sqrt, MVT::v8f64, 1},
+ {Intrinsic::sqrt, MVT::v16f64, 1},
+ {Intrinsic::sqrt, MVT::nxv1f64, 1},
+ {Intrinsic::sqrt, MVT::nxv2f64, 1},
+ {Intrinsic::sqrt, MVT::nxv4f64, 1},
+ {Intrinsic::sqrt, MVT::nxv8f64, 1},
+ {Intrinsic::bswap, MVT::v2i16, 3},
+ {Intrinsic::bswap, MVT::v4i16, 3},
+ {Intrinsic::bswap, MVT::v8i16, 3},
+ {Intrinsic::bswap, MVT::v16i16, 3},
+ {Intrinsic::bswap, MVT::nxv2i16, 3},
+ {Intrinsic::bswap, MVT::nxv4i16, 3},
+ {Intrinsic::bswap, MVT::nxv8i16, 3},
+ {Intrinsic::bswap, MVT::nxv16i16, 3},
+ {Intrinsic::bswap, MVT::v2i32, 12},
+ {Intrinsic::bswap, MVT::v4i32, 12},
+ {Intrinsic::bswap, MVT::v8i32, 12},
+ {Intrinsic::bswap, MVT::v16i32, 12},
+ {Intrinsic::bswap, MVT::nxv2i32, 12},
+ {Intrinsic::bswap, MVT::nxv4i32, 12},
+ {Intrinsic::bswap, MVT::nxv8i32, 12},
+ {Intrinsic::bswap, MVT::nxv16i32, 12},
+ {Intrinsic::bswap, MVT::v2i64, 31},
+ {Intrinsic::bswap, MVT::v4i64, 31},
+ {Intrinsic::bswap, MVT::v8i64, 31},
+ {Intrinsic::bswap, MVT::v16i64, 31},
+ {Intrinsic::bswap, MVT::nxv2i64, 31},
+ {Intrinsic::bswap, MVT::nxv4i64, 31},
+ {Intrinsic::bswap, MVT::nxv8i64, 31},
+ {Intrinsic::bitreverse, MVT::v2i8, 17},
+ {Intrinsic::bitreverse, MVT::v4i8, 17},
+ {Intrinsic::bitreverse, MVT::v8i8, 17},
+ {Intrinsic::bitreverse, MVT::v16i8, 17},
+ {Intrinsic::bitreverse, MVT::nxv2i8, 17},
+ {Intrinsic::bitreverse, MVT::nxv4i8, 17},
+ {Intrinsic::bitreverse, MVT::nxv8i8, 17},
+ {Intrinsic::bitreverse, MVT::nxv16i8, 17},
+ {Intrinsic::bitreverse, MVT::v2i16, 24},
+ {Intrinsic::bitreverse, MVT::v4i16, 24},
+ {Intrinsic::bitreverse, MVT::v8i16, 24},
+ {Intrinsic::bitreverse, MVT::v16i16, 24},
+ {Intrinsic::bitreverse, MVT::nxv2i16, 24},
+ {Intrinsic::bitreverse, MVT::nxv4i16, 24},
+ {Intrinsic::bitreverse, MVT::nxv8i16, 24},
+ {Intrinsic::bitreverse, MVT::nxv16i16, 24},
+ {Intrinsic::bitreverse, MVT::v2i32, 33},
+ {Intrinsic::bitreverse, MVT::v4i32, 33},
+ {Intrinsic::bitreverse, MVT::v8i32, 33},
+ {Intrinsic::bitreverse, MVT::v16i32, 33},
+ {Intrinsic::bitreverse, MVT::nxv2i32, 33},
+ {Intrinsic::bitreverse, MVT::nxv4i32, 33},
+ {Intrinsic::bitreverse, MVT::nxv8i32, 33},
+ {Intrinsic::bitreverse, MVT::nxv16i32, 33},
+ {Intrinsic::bitreverse, MVT::v2i64, 52},
+ {Intrinsic::bitreverse, MVT::v4i64, 52},
+ {Intrinsic::bitreverse, MVT::v8i64, 52},
+ {Intrinsic::bitreverse, MVT::v16i64, 52},
+ {Intrinsic::bitreverse, MVT::nxv2i64, 52},
+ {Intrinsic::bitreverse, MVT::nxv4i64, 52},
+ {Intrinsic::bitreverse, MVT::nxv8i64, 52},
+ {Intrinsic::ctpop, MVT::v2i8, 12},
+ {Intrinsic::ctpop, MVT::v4i8, 12},
+ {Intrinsic::ctpop, MVT::v8i8, 12},
+ {Intrinsic::ctpop, MVT::v16i8, 12},
+ {Intrinsic::ctpop, MVT::nxv2i8, 12},
+ {Intrinsic::ctpop, MVT::nxv4i8, 12},
+ {Intrinsic::ctpop, MVT::nxv8i8, 12},
+ {Intrinsic::ctpop, MVT::nxv16i8, 12},
+ {Intrinsic::ctpop, MVT::v2i16, 19},
+ {Intrinsic::ctpop, MVT::v4i16, 19},
+ {Intrinsic::ctpop, MVT::v8i16, 19},
+ {Intrinsic::ctpop, MVT::v16i16, 19},
+ {Intrinsic::ctpop, MVT::nxv2i16, 19},
+ {Intrinsic::ctpop, MVT::nxv4i16, 19},
+ {Intrinsic::ctpop, MVT::nxv8i16, 19},
+ {Intrinsic::ctpop, MVT::nxv16i16, 19},
+ {Intrinsic::ctpop, MVT::v2i32, 20},
+ {Intrinsic::ctpop, MVT::v4i32, 20},
+ {Intrinsic::ctpop, MVT::v8i32, 20},
+ {Intrinsic::ctpop, MVT::v16i32, 20},
+ {Intrinsic::ctpop, MVT::nxv2i32, 20},
+ {Intrinsic::ctpop, MVT::nxv4i32, 20},
+ {Intrinsic::ctpop, MVT::nxv8i32, 20},
+ {Intrinsic::ctpop, MVT::nxv16i32, 20},
+ {Intrinsic::ctpop, MVT::v2i64, 21},
+ {Intrinsic::ctpop, MVT::v4i64, 21},
+ {Intrinsic::ctpop, MVT::v8i64, 21},
+ {Intrinsic::ctpop, MVT::v16i64, 21},
+ {Intrinsic::ctpop, MVT::nxv2i64, 21},
+ {Intrinsic::ctpop, MVT::nxv4i64, 21},
+ {Intrinsic::ctpop, MVT::nxv8i64, 21},
+ {Intrinsic::sadd_sat, MVT::v2i8, 1},
+ {Intrinsic::sadd_sat, MVT::v4i8, 1},
+ {Intrinsic::sadd_sat, MVT::v8i8, 1},
+ {Intrinsic::sadd_sat, MVT::v16i8, 1},
+ {Intrinsic::sadd_sat, MVT::nxv2i8, 1},
+ {Intrinsic::sadd_sat, MVT::nxv4i8, 1},
+ {Intrinsic::sadd_sat, MVT::nxv8i8, 1},
+ {Intrinsic::sadd_sat, MVT::nxv16i8, 1},
+ {Intrinsic::sadd_sat, MVT::v2i16, 1},
+ {Intrinsic::sadd_sat, MVT::v4i16, 1},
+ {Intrinsic::sadd_sat, MVT::v8i16, 1},
+ {Intrinsic::sadd_sat, MVT::v16i16, 1},
+ {Intrinsic::sadd_sat, MVT::nxv2i16, 1},
+ {Intrinsic::sadd_sat, MVT::nxv4i16, 1},
+ {Intrinsic::sadd_sat, MVT::nxv8i16, 1},
+ {Intrinsic::sadd_sat, MVT::nxv16i16, 1},
+ {Intrinsic::sadd_sat, MVT::v2i32, 1},
+ {Intrinsic::sadd_sat, MVT::v4i32, 1},
+ {Intrinsic::sadd_sat, MVT::v8i32, 1},
+ {Intrinsic::sadd_sat, MVT::v16i32, 1},
+ {Intrinsic::sadd_sat, MVT::nxv2i32, 1},
+ {Intrinsic::sadd_sat, MVT::nxv4i32, 1},
+ {Intrinsic::sadd_sat, MVT::nxv8i32, 1},
+ {Intrinsic::sadd_sat, MVT::nxv16i32, 1},
+ {Intrinsic::sadd_sat, MVT::v2i64, 1},
+ {Intrinsic::sadd_sat, MVT::v4i64, 1},
+ {Intrinsic::sadd_sat, MVT::v8i64, 1},
+ {Intrinsic::sadd_sat, MVT::v16i64, 1},
+ {Intrinsic::sadd_sat, MVT::nxv2i64, 1},
+ {Intrinsic::sadd_sat, MVT::nxv4i64, 1},
+ {Intrinsic::sadd_sat, MVT::nxv8i64, 1},
+ {Intrinsic::uadd_sat, MVT::v2i8, 1},
+ {Intrinsic::uadd_sat, MVT::v4i8, 1},
+ {Intrinsic::uadd_sat, MVT::v8i8, 1},
+ {Intrinsic::uadd_sat, MVT::v16i8, 1},
+ {Intrinsic::uadd_sat, MVT::nxv2i8, 1},
+ {Intrinsic::uadd_sat, MVT::nxv4i8, 1},
+ {Intrinsic::uadd_sat, MVT::nxv8i8, 1},
+ {Intrinsic::uadd_sat, MVT::nxv16i8, 1},
+ {Intrinsic::uadd_sat, MVT::v2i16, 1},
+ {Intrinsic::uadd_sat, MVT::v4i16, 1},
+ {Intrinsic::uadd_sat, MVT::v8i16, 1},
+ {Intrinsic::uadd_sat, MVT::v16i16, 1},
+ {Intrinsic::uadd_sat, MVT::nxv2i16, 1},
+ {Intrinsic::uadd_sat, MVT::nxv4i16, 1},
+ {Intrinsic::uadd_sat, MVT::nxv8i16, 1},
+ {Intrinsic::uadd_sat, MVT::nxv16i16, 1},
+ {Intrinsic::uadd_sat, MVT::v2i32, 1},
+ {Intrinsic::uadd_sat, MVT::v4i32, 1},
+ {Intrinsic::uadd_sat, MVT::v8i32, 1},
+ {Intrinsic::uadd_sat, MVT::v16i32, 1},
+ {Intrinsic::uadd_sat, MVT::nxv2i32, 1},
+ {Intrinsic::uadd_sat, MVT::nxv4i32, 1},
+ {Intrinsic::uadd_sat, MVT::nxv8i32, 1},
+ {Intrinsic::uadd_sat, MVT::nxv16i32, 1},
+ {Intrinsic::uadd_sat, MVT::v2i64, 1},
+ {Intrinsic::uadd_sat, MVT::v4i64, 1},
+ {Intrinsic::uadd_sat, MVT::v8i64, 1},
+ {Intrinsic::uadd_sat, MVT::v16i64, 1},
+ {Intrinsic::uadd_sat, MVT::nxv2i64, 1},
+ {Intrinsic::uadd_sat, MVT::nxv4i64, 1},
+ {Intrinsic::uadd_sat, MVT::nxv8i64, 1},
+ {Intrinsic::usub_sat, MVT::v2i8, 1},
+ {Intrinsic::usub_sat, MVT::v4i8, 1},
+ {Intrinsic::usub_sat, MVT::v8i8, 1},
+ {Intrinsic::usub_sat, MVT::v16i8, 1},
+ {Intrinsic::usub_sat, MVT::nxv2i8, 1},
+ {Intrinsic::usub_sat, MVT::nxv4i8, 1},
+ {Intrinsic::usub_sat, MVT::nxv8i8, 1},
+ {Intrinsic::usub_sat, MVT::nxv16i8, 1},
+ {Intrinsic::usub_sat, MVT::v2i16, 1},
+ {Intrinsic::usub_sat, MVT::v4i16, 1},
+ {Intrinsic::usub_sat, MVT::v8i16, 1},
+ {Intrinsic::usub_sat, MVT::v16i16, 1},
+ {Intrinsic::usub_sat, MVT::nxv2i16, 1},
+ {Intrinsic::usub_sat, MVT::nxv4i16, 1},
+ {Intrinsic::usub_sat, MVT::nxv8i16, 1},
+ {Intrinsic::usub_sat, MVT::nxv16i16, 1},
+ {Intrinsic::usub_sat, MVT::v2i32, 1},
+ {Intrinsic::usub_sat, MVT::v4i32, 1},
+ {Intrinsic::usub_sat, MVT::v8i32, 1},
+ {Intrinsic::usub_sat, MVT::v16i32, 1},
+ {Intrinsic::usub_sat, MVT::nxv2i32, 1},
+ {Intrinsic::usub_sat, MVT::nxv4i32, 1},
+ {Intrinsic::usub_sat, MVT::nxv8i32, 1},
+ {Intrinsic::usub_sat, MVT::nxv16i32, 1},
+ {Intrinsic::usub_sat, MVT::v2i64, 1},
+ {Intrinsic::usub_sat, MVT::v4i64, 1},
+ {Intrinsic::usub_sat, MVT::v8i64, 1},
+ {Intrinsic::usub_sat, MVT::v16i64, 1},
+ {Intrinsic::usub_sat, MVT::nxv2i64, 1},
+ {Intrinsic::usub_sat, MVT::nxv4i64, 1},
+ {Intrinsic::usub_sat, MVT::nxv8i64, 1},
+ {Intrinsic::ssub_sat, MVT::v2i8, 1},
+ {Intrinsic::ssub_sat, MVT::v4i8, 1},
+ {Intrinsic::ssub_sat, MVT::v8i8, 1},
+ {Intrinsic::ssub_sat, MVT::v16i8, 1},
+ {Intrinsic::ssub_sat, MVT::nxv2i8, 1},
+ {Intrinsic::ssub_sat, MVT::nxv4i8, 1},
+ {Intrinsic::ssub_sat, MVT::nxv8i8, 1},
+ {Intrinsic::ssub_sat, MVT::nxv16i8, 1},
+ {Intrinsic::ssub_sat, MVT::v2i16, 1},
+ {Intrinsic::ssub_sat, MVT::v4i16, 1},
+ {Intrinsic::ssub_sat, MVT::v8i16, 1},
+ {Intrinsic::ssub_sat, MVT::v16i16, 1},
+ {Intrinsic::ssub_sat, MVT::nxv2i16, 1},
+ {Intrinsic::ssub_sat, MVT::nxv4i16, 1},
+ {Intrinsic::ssub_sat, MVT::nxv8i16, 1},
+ {Intrinsic::ssub_sat, MVT::nxv16i16, 1},
+ {Intrinsic::ssub_sat, MVT::v2i32, 1},
+ {Intrinsic::ssub_sat, MVT::v4i32, 1},
+ {Intrinsic::ssub_sat, MVT::v8i32, 1},
+ {Intrinsic::ssub_sat, MVT::v16i32, 1},
+ {Intrinsic::ssub_sat, MVT::nxv2i32, 1},
+ {Intrinsic::ssub_sat, MVT::nxv4i32, 1},
+ {Intrinsic::ssub_sat, MVT::nxv8i32, 1},
+ {Intrinsic::ssub_sat, MVT::nxv16i32, 1},
+ {Intrinsic::ssub_sat, MVT::v2i64, 1},
+ {Intrinsic::ssub_sat, MVT::v4i64, 1},
+ {Intrinsic::ssub_sat, MVT::v8i64, 1},
+ {Intrinsic::ssub_sat, MVT::v16i64, 1},
+ {Intrinsic::ssub_sat, MVT::nxv2i64, 1},
+ {Intrinsic::ssub_sat, MVT::nxv4i64, 1},
+ {Intrinsic::ssub_sat, MVT::nxv8i64, 1},
};
InstructionCost
@@ -700,6 +576,16 @@ RISCVTTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
TTI::TargetCostKind CostKind) {
auto *RetTy = ICA.getReturnType();
switch (ICA.getID()) {
+ case Intrinsic::umin:
+ case Intrinsic::umax:
+ case Intrinsic::smin:
+ case Intrinsic::smax: {
+ auto LT = getTypeLegalizationCost(RetTy);
+ if ((ST->hasVInstructions() && LT.second.isVector()) ||
+ (LT.second.isScalarInteger() && ST->hasStdExtZbb()))
+ return LT.first;
+ break;
+ }
// TODO: add more intrinsic
case Intrinsic::experimental_stepvector: {
unsigned Cost = 1; // vid
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