[llvm] 9861a68 - [Target] Qualify auto in range-based for loops (NFC)
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 28 10:42:05 PDT 2022
Author: Kazu Hirata
Date: 2022-08-28T10:41:50-07:00
New Revision: 9861a68a7cc5825fc9e680c76dfe71cda4a3c0b9
URL: https://github.com/llvm/llvm-project/commit/9861a68a7cc5825fc9e680c76dfe71cda4a3c0b9
DIFF: https://github.com/llvm/llvm-project/commit/9861a68a7cc5825fc9e680c76dfe71cda4a3c0b9.diff
LOG: [Target] Qualify auto in range-based for loops (NFC)
Added:
Modified:
llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
llvm/lib/Target/AMDGPU/AMDGPUOpenCLEnqueuedBlockLowering.cpp
llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
llvm/lib/Target/AMDGPU/AMDGPUUnifyMetadata.cpp
llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp
llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp b/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
index 48ded3610b87..eccb0997a849 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
@@ -238,7 +238,7 @@ void MetadataStreamerV2::emitPrintf(const Module &Mod) {
if (!Node)
return;
- for (auto Op : Node->operands())
+ for (auto *Op : Node->operands())
if (Op->getNumOperands())
Printf.push_back(
std::string(cast<MDString>(Op->getOperand(0))->getString()));
@@ -623,7 +623,7 @@ void MetadataStreamerV3::emitPrintf(const Module &Mod) {
return;
auto Printf = HSAMetadataDoc->getArrayNode();
- for (auto Op : Node->operands())
+ for (auto *Op : Node->operands())
if (Op->getNumOperands())
Printf.push_back(Printf.getDocument()->getNode(
cast<MDString>(Op->getOperand(0))->getString(), /*Copy=*/true));
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp b/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
index 92c1b37758f1..6723574aeba4 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
@@ -931,7 +931,7 @@ bool SchedGroup::canAddMI(const MachineInstr &MI) const {
int SchedGroup::link(SUnit &SU, bool MakePred,
std::vector<std::pair<SUnit *, SUnit *>> &AddedEdges) {
int MissedEdges = 0;
- for (auto A : Collection) {
+ for (auto *A : Collection) {
SUnit *B = &SU;
if (A == B || A->getInstr()->getOpcode() == AMDGPU::SCHED_GROUP_BARRIER)
continue;
@@ -953,7 +953,7 @@ int SchedGroup::link(SUnit &SU, bool MakePred,
}
void SchedGroup::link(SUnit &SU, bool MakePred) {
- for (auto A : Collection) {
+ for (auto *A : Collection) {
SUnit *B = &SU;
if (A->getInstr()->getOpcode() == AMDGPU::SCHED_GROUP_BARRIER)
continue;
@@ -966,7 +966,7 @@ void SchedGroup::link(SUnit &SU, bool MakePred) {
void SchedGroup::link(SUnit &SU,
function_ref<bool(const SUnit *A, const SUnit *B)> P) {
- for (auto A : Collection) {
+ for (auto *A : Collection) {
SUnit *B = &SU;
if (P(A, B))
std::swap(A, B);
@@ -976,7 +976,7 @@ void SchedGroup::link(SUnit &SU,
}
void SchedGroup::link(SchedGroup &OtherGroup) {
- for (auto B : OtherGroup.Collection)
+ for (auto *B : OtherGroup.Collection)
link(*B);
}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp b/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
index d837f8cb2f60..2a35937590b2 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
@@ -157,7 +157,7 @@ void PHILinearize::phiInfoElementRemoveSource(PHIInfoElementT *Info,
PHILinearize::PHIInfoElementT *
PHILinearize::findPHIInfoElement(unsigned DestReg) {
- for (auto I : PHIInfo) {
+ for (auto *I : PHIInfo) {
if (phiInfoElementGetDest(I) == DestReg) {
return I;
}
@@ -168,7 +168,7 @@ PHILinearize::findPHIInfoElement(unsigned DestReg) {
PHILinearize::PHIInfoElementT *
PHILinearize::findPHIInfoElementFromSource(unsigned SourceReg,
MachineBasicBlock *SourceMBB) {
- for (auto I : PHIInfo) {
+ for (auto *I : PHIInfo) {
for (auto SI : phiInfoElementGetSources(I)) {
if (SI.first == SourceReg &&
(SI.second == nullptr || SI.second == SourceMBB)) {
@@ -182,7 +182,7 @@ PHILinearize::findPHIInfoElementFromSource(unsigned SourceReg,
bool PHILinearize::findSourcesFromMBB(MachineBasicBlock *SourceMBB,
SmallVector<unsigned, 4> &Sources) {
bool FoundSource = false;
- for (auto I : PHIInfo) {
+ for (auto *I : PHIInfo) {
for (auto SI : phiInfoElementGetSources(I)) {
if (SI.second == SourceMBB) {
FoundSource = true;
@@ -247,7 +247,7 @@ unsigned PHILinearize::getNumSources(unsigned DestReg) {
LLVM_DUMP_METHOD void PHILinearize::dump(MachineRegisterInfo *MRI) {
const TargetRegisterInfo *TRI = MRI->getTargetRegisterInfo();
dbgs() << "=PHIInfo Start=\n";
- for (auto PII : this->PHIInfo) {
+ for (auto *PII : this->PHIInfo) {
PHIInfoElementT &Element = *PII;
dbgs() << "Dest: " << printReg(Element.DestReg, TRI)
<< " Sources: {";
@@ -506,7 +506,7 @@ class RegionMRT : public MRT {
delete LRegion;
}
- for (auto CI : Children) {
+ for (auto *CI : Children) {
delete &(*CI);
}
}
@@ -540,7 +540,7 @@ class RegionMRT : public MRT {
dbgs() << "Succ: " << getSucc()->getNumber() << "\n";
else
dbgs() << "Succ: none \n";
- for (auto MRTI : Children) {
+ for (auto *MRTI : Children) {
MRTI->dump(TRI, depth + 1);
}
}
@@ -566,7 +566,7 @@ class RegionMRT : public MRT {
MachineBasicBlock *getSucc() { return Succ; }
bool contains(MachineBasicBlock *MBB) {
- for (auto CI : Children) {
+ for (auto *CI : Children) {
if (CI->isMBB()) {
if (MBB == CI->getMBBMRT()->getMBB()) {
return true;
@@ -632,7 +632,7 @@ RegionMRT *MRT::buildMRT(MachineFunction &MF,
RegionMap[RegionInfo->getRegionFor(Exit)]->addChild(ExitMRT);
ExitMRT->setBBSelectRegIn(BBSelectRegIn);
- for (auto MBBI : post_order(&(MF.front()))) {
+ for (auto *MBBI : post_order(&(MF.front()))) {
MachineBasicBlock *MBB = &(*MBBI);
// Skip Exit since we already added it
@@ -804,7 +804,7 @@ void LinearizedRegion::storeLiveOuts(RegionMRT *Region,
return;
auto Children = Region->getChildren();
- for (auto CI : *Children) {
+ for (auto *CI : *Children) {
if (CI->isMBB()) {
auto MBB = CI->getMBBMRT()->getMBB();
storeMBBLiveOuts(MBB, MRI, TRI, PHIInfo, TopRegion);
@@ -812,7 +812,7 @@ void LinearizedRegion::storeLiveOuts(RegionMRT *Region,
LinearizedRegion *SubRegion = CI->getRegionMRT()->getLinearizedRegion();
// We should be limited to only store registers that are live out from the
// linearized region
- for (auto MBBI : SubRegion->MBBs) {
+ for (auto *MBBI : SubRegion->MBBs) {
storeMBBLiveOuts(MBBI, MRI, TRI, PHIInfo, TopRegion);
}
}
@@ -841,7 +841,7 @@ void LinearizedRegion::storeLiveOuts(RegionMRT *Region,
void LinearizedRegion::print(raw_ostream &OS, const TargetRegisterInfo *TRI) {
OS << "Linearized Region {";
bool IsFirst = true;
- for (auto MBB : MBBs) {
+ for (auto *MBB : MBBs) {
if (IsFirst) {
IsFirst = false;
} else {
@@ -976,7 +976,7 @@ MachineBasicBlock *LinearizedRegion::getExit() { return Exit; }
void LinearizedRegion::addMBB(MachineBasicBlock *MBB) { MBBs.insert(MBB); }
void LinearizedRegion::addMBBs(LinearizedRegion *InnerRegion) {
- for (auto MBB : InnerRegion->MBBs) {
+ for (auto *MBB : InnerRegion->MBBs) {
addMBB(MBB);
}
}
@@ -999,7 +999,7 @@ void LinearizedRegion::removeFalseRegisterKills(MachineRegisterInfo *MRI) {
const TargetRegisterInfo *TRI = MRI->getTargetRegisterInfo();
(void)TRI; // It's used by LLVM_DEBUG.
- for (auto MBBI : MBBs) {
+ for (auto *MBBI : MBBs) {
MachineBasicBlock *MBB = MBBI;
for (auto &II : *MBB) {
for (auto &RI : II.uses()) {
@@ -1300,7 +1300,7 @@ static void fixRegionTerminator(RegionMRT *Region) {
// linearizing it, because it is already linear
bool regionIsSequence(RegionMRT *Region) {
auto Children = Region->getChildren();
- for (auto CI : *Children) {
+ for (auto *CI : *Children) {
if (!CI->isRegion()) {
if (CI->getMBBMRT()->getMBB()->succ_size() > 1) {
return false;
@@ -1312,7 +1312,7 @@ bool regionIsSequence(RegionMRT *Region) {
void fixupRegionExits(RegionMRT *Region) {
auto Children = Region->getChildren();
- for (auto CI : *Children) {
+ for (auto *CI : *Children) {
if (!CI->isRegion()) {
fixMBBTerminator(CI->getMBBMRT()->getMBB());
} else {
@@ -1400,7 +1400,7 @@ void AMDGPUMachineCFGStructurizer::extractKilledPHIs(MachineBasicBlock *MBB) {
}
}
- for (auto PI : PHIs) {
+ for (auto *PI : PHIs) {
PI->eraseFromParent();
}
}
@@ -1637,7 +1637,7 @@ void AMDGPUMachineCFGStructurizer::rewriteRegionExitPHIs(RegionMRT *Region,
collectPHIs(Exit, PHIs);
- for (auto PHII : PHIs) {
+ for (auto *PHII : PHIs) {
rewriteRegionExitPHI(Region, LastMerge, *PHII, LRegion);
}
}
@@ -1649,7 +1649,7 @@ void AMDGPUMachineCFGStructurizer::rewriteRegionEntryPHIs(LinearizedRegion *Regi
collectPHIs(Entry, PHIs);
- for (auto PHII : PHIs) {
+ for (auto *PHII : PHIs) {
rewriteRegionEntryPHI(Region, IfMBB, *PHII);
}
}
@@ -2423,7 +2423,7 @@ void AMDGPUMachineCFGStructurizer::splitLoopPHIs(MachineBasicBlock *Entry,
SmallVector<MachineInstr *, 2> PHIs;
collectPHIs(Entry, PHIs);
- for (auto PHII : PHIs) {
+ for (auto *PHII : PHIs) {
splitLoopPHI(*PHII, Entry, EntrySucc, LRegion);
}
}
@@ -2734,7 +2734,7 @@ bool AMDGPUMachineCFGStructurizer::structurizeRegions(RegionMRT *Region,
bool Changed = false;
auto Children = Region->getChildren();
- for (auto CI : *Children) {
+ for (auto *CI : *Children) {
if (CI->isRegion()) {
Changed |= structurizeRegions(CI->getRegionMRT(), false);
}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUOpenCLEnqueuedBlockLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUOpenCLEnqueuedBlockLowering.cpp
index fb7709d66c76..8b61d9f72737 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUOpenCLEnqueuedBlockLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUOpenCLEnqueuedBlockLowering.cpp
@@ -75,7 +75,7 @@ ModulePass* llvm::createAMDGPUOpenCLEnqueuedBlockLoweringPass() {
/// Collect direct or indirect callers of \p F and save them
/// to \p Callers.
static void collectCallers(Function *F, DenseSet<Function *> &Callers) {
- for (auto U : F->users()) {
+ for (auto *U : F->users()) {
if (auto *CI = dyn_cast<CallInst>(&*U)) {
auto *Caller = CI->getParent()->getParent();
if (Callers.insert(Caller).second)
@@ -95,7 +95,7 @@ static void collectFunctionUsers(User *U, DenseSet<Function *> &Funcs) {
}
if (!isa<Constant>(U))
return;
- for (auto UU : U->users())
+ for (auto *UU : U->users())
collectFunctionUsers(&*UU, Funcs);
}
@@ -123,7 +123,7 @@ bool AMDGPUOpenCLEnqueuedBlockLowering::runOnModule(Module &M) {
/*isExternallyInitialized=*/false);
LLVM_DEBUG(dbgs() << "runtime handle created: " << *GV << '\n');
- for (auto U : F.users()) {
+ for (auto *U : F.users()) {
auto *UU = &*U;
if (!isa<ConstantExpr>(UU))
continue;
@@ -138,7 +138,7 @@ bool AMDGPUOpenCLEnqueuedBlockLowering::runOnModule(Module &M) {
}
}
- for (auto F : Callers) {
+ for (auto *F : Callers) {
if (F->getCallingConv() != CallingConv::AMDGPU_KERNEL)
continue;
F->addFnAttr("calls-enqueue-kernel");
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp b/llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
index 1db7c18e4598..61e48e29aeeb 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
@@ -153,7 +153,7 @@ bool AMDGPUPrintfRuntimeBindingImpl::lowerPrintfForGpu(Module &M) {
// NB: This is important for this string size to be divisible by 4
const char NonLiteralStr[4] = "???";
- for (auto CI : Printfs) {
+ for (auto *CI : Printfs) {
unsigned NumOps = CI->arg_size();
SmallString<16> OpConvSpecifiers;
@@ -161,7 +161,7 @@ bool AMDGPUPrintfRuntimeBindingImpl::lowerPrintfForGpu(Module &M) {
if (auto LI = dyn_cast<LoadInst>(Op)) {
Op = LI->getPointerOperand();
- for (auto Use : Op->users()) {
+ for (auto *Use : Op->users()) {
if (auto SI = dyn_cast<StoreInst>(Use)) {
Op = SI->getValueOperand();
break;
@@ -537,7 +537,7 @@ bool AMDGPUPrintfRuntimeBindingImpl::lowerPrintfForGpu(Module &M) {
}
// erase the printf calls
- for (auto CI : Printfs)
+ for (auto *CI : Printfs)
CI->eraseFromParent();
Printfs.clear();
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUUnifyMetadata.cpp b/llvm/lib/Target/AMDGPU/AMDGPUUnifyMetadata.cpp
index 240b6c2ff462..327666c2a0f2 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUUnifyMetadata.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUUnifyMetadata.cpp
@@ -58,7 +58,7 @@ namespace {
return false;
MDNode *MaxMD = nullptr;
auto MaxVer = 0U;
- for (auto VersionMD : NamedMD->operands()) {
+ for (auto *VersionMD : NamedMD->operands()) {
assert(VersionMD->getNumOperands() == 2);
auto CMajor = mdconst::extract<ConstantInt>(VersionMD->getOperand(0));
auto VersionMajor = CMajor->getZExtValue();
@@ -91,7 +91,7 @@ namespace {
return false;
SmallVector<Metadata *, 4> All;
- for (auto MD : NamedMD->operands())
+ for (auto *MD : NamedMD->operands())
for (const auto &Op : MD->operands())
if (!llvm::is_contained(All, Op.get()))
All.push_back(Op.get());
diff --git a/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp b/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
index 1e07a617cb79..58add8c0e1c9 100644
--- a/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
@@ -733,7 +733,7 @@ bool GCNDPPCombine::runOnMachineFunction(MachineFunction &MF) {
++NumDPPMovsCombined;
} else {
auto Split = TII->expandMovDPP64(MI);
- for (auto M : { Split.first, Split.second }) {
+ for (auto *M : {Split.first, Split.second}) {
if (M && combineDPPMov(*M))
++NumDPPMovsCombined;
}
diff --git a/llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp b/llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
index 22b529bee46e..f06de11f9838 100644
--- a/llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
@@ -439,7 +439,7 @@ unsigned GCNIterativeScheduler::tryMaximizeOccupancy(unsigned TargetOcc) {
<< ", current = " << Occ << '\n');
auto NewOcc = TargetOcc;
- for (auto R : Regions) {
+ for (auto *R : Regions) {
if (R->MaxPressure.getOccupancy(ST) >= NewOcc)
break;
@@ -495,7 +495,7 @@ void GCNIterativeScheduler::scheduleLegacyMaxOccupancy(
// running first pass with TargetOccupancy = 0 mimics previous scheduling
// approach and is a performance magic
LStrgy.setTargetOccupancy(I == 0 ? 0 : TgtOcc);
- for (auto R : Regions) {
+ for (auto *R : Regions) {
OverrideLegacyStrategy Ovr(*R, LStrgy, *this);
Ovr.schedule();
@@ -530,7 +530,7 @@ void GCNIterativeScheduler::scheduleMinReg(bool force) {
sortRegionsByPressure(TgtOcc);
auto MaxPressure = Regions.front()->MaxPressure;
- for (auto R : Regions) {
+ for (auto *R : Regions) {
if (!force && R->MaxPressure.less(ST, MaxPressure, TgtOcc))
break;
@@ -574,7 +574,7 @@ void GCNIterativeScheduler::scheduleILP(
<< TgtOcc << '\n');
unsigned FinalOccupancy = std::min(Occ, MFI->getOccupancy());
- for (auto R : Regions) {
+ for (auto *R : Regions) {
BuildDAG DAG(*R, *this);
const auto ILPSchedule = makeGCNILPScheduler(DAG.getBottomRoots(), *this);
diff --git a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
index b77499e0fee9..33abfe9264fb 100644
--- a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
@@ -575,7 +575,7 @@ static bool hoistAndMergeSGPRInits(unsigned Reg,
// Try to schedule SGPR initializations as early as possible in the MBB.
for (auto &Init : Inits) {
auto &Defs = Init.second;
- for (auto MI : Defs) {
+ for (auto *MI : Defs) {
auto MBB = MI->getParent();
MachineInstr &BoundaryMI = *getFirstNonPrologue(MBB, TII);
MachineBasicBlock::reverse_iterator B(BoundaryMI);
@@ -924,7 +924,7 @@ void SIFixSGPRCopies::analyzeVGPRToSGPRCopy(V2SCopyInfo& Info) {
for (auto &U : MRI->use_instructions(Reg))
Users.push_back(&U);
}
- for (auto U : Users) {
+ for (auto *U : Users) {
if (TII->isSALU(*U))
Info.SChain.insert(U);
AnalysisWorklist.push_back(U);
diff --git a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
index 2e76679f400d..eb31cb21825d 100644
--- a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
@@ -1249,7 +1249,7 @@ bool SIFoldOperands::foldInstOperand(MachineInstr &MI,
SmallVector<MachineOperand *, 4> UsesToProcess;
for (auto &Use : MRI->use_nodbg_operands(Dst.getReg()))
UsesToProcess.push_back(&Use);
- for (auto U : UsesToProcess) {
+ for (auto *U : UsesToProcess) {
MachineInstr *UseMI = U->getParent();
foldOperand(OpToFold, UseMI, UseMI->getOperandNo(U), FoldList,
CopiesToReplace);
diff --git a/llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp b/llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp
index 47095ae22027..df522a9099c0 100644
--- a/llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp
@@ -206,7 +206,7 @@ bool SILateBranchLowering::runOnMachineFunction(MachineFunction &MF) {
MF.insert(MF.end(), EmptyMBBAtEnd);
}
- for (auto MI : EpilogInstrs) {
+ for (auto *MI : EpilogInstrs) {
auto MBB = MI->getParent();
if (MBB == &MF.back() && MI == &MBB->back())
continue;
diff --git a/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp b/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
index 8d33b8a1fd4b..61444b14a56b 100644
--- a/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
+++ b/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
@@ -209,7 +209,7 @@ bool SIPreEmitPeephole::optimizeVccBranch(MachineInstr &MI) const {
}
}
assert(Found && "conditional branch is not terminator");
- for (auto BranchMI : ToRemove) {
+ for (auto *BranchMI : ToRemove) {
MachineOperand &Dst = BranchMI->getOperand(0);
assert(Dst.isMBB() && "destination is not basic block");
Parent->removeSuccessor(Dst.getMBB());
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