[PATCH] D130397: [RISCV] Custom type legalize i32 loads by sign extending.

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 456147.
craig.topper added a comment.

Add comment to extending load change


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130397/new/

https://reviews.llvm.org/D130397

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/sextw-removal.ll
  llvm/test/CodeGen/RISCV/vec3-setcc-crash.ll

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