[PATCH] D128216: [X86] Add SimplifyMultipleUseDemandedBitsForTargetNode X86ISD::ANDNP handling

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

The interleaved shuffles tend to create a sequence of ORs/BLENDs with zeros - for 265-bit on AVX2+ that means usually means 2 x VPBLENDD but the AVX1 path usually ends up with a OR(AND,ANDN) pattern instead.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128216/new/

https://reviews.llvm.org/D128216